Datasheet > S29C82

S29C82

更新时间： 2024-09-17 19:44:51

品牌	Logo	应用领域
TEMIC		商用集成电路
页数	文件大小	规格书
36页	348K
描述
Consumer Circuit, PQCC68, PLASTIC, LCC-68

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技术参数
数据手册

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S29C82 技术参数

生命周期：	Transferred	包装说明：	PLASTIC, LCC-68
Reach Compliance Code：	unknown	风险等级：	5.7
商用集成电路类型：	CONSUMER CIRCUIT	JESD-30 代码：	S-PQCC-J68
功能数量：	1	端子数量：	68
最高工作温度：	70 °C	最低工作温度：
封装主体材料：	PLASTIC/EPOXY	封装形状：	SQUARE
封装形式：	CHIP CARRIER	认证状态：	Not Qualified
最大供电电压 (Vsup)：	5.5 V	最小供电电压 (Vsup)：	4.5 V
表面贴装：	YES	温度等级：	COMMERCIAL
端子形式：	J BEND	端子位置：	QUAD
Base Number Matches：	1

S29C82 数据手册

MATRA MHS

29C82^*

JPEG Decoder

Description

The 29C82 performs decompression of still pictures in The 29C82 is a peripheral circuit which communicates

accordance with the ISO JPEG 8 R6 standard for basic with the microprocessor over the DATA [0..7] and

systems (pixels coded in 8 bits, sequential display, ADDRESS [0..3] busses. The microprocessor performs

HUFFMAN coding, etc). The 29C82 independently decoding of the JPEG image frame header in order to

executes most following of the adaptive discrete cosine extract the markers, the image parameters, the

transform (ADCT) algorithm :

quantization, and the VLC tables. These tables and

parameters are then used to program the 29C82. After

decoding, the pixels are available on pixels bus

PIXEL[0..7] of the 29C82 or on the DATA [0..7] system

bus. The 29C82 is able to provide pixels at a speed of

1.25 MPixels/s on PIXEL[0..7], with the system clock

(CLK) at 20 MHz.

–

VLC (HUFFMAN) decoding using tables created by

the user or contained in the JPEG image frame. Two

AC tables and two DC tables can be loaded into the

29C82.

–

de-quantization using tables contained in the JPEG

image frame. Two DC tables and two AC tables can

be loaded into the 29C82.

inverse COSINE transform.

Features

D Decoding of still images to the ISO JPEG-8 Rev6 standard.

D Performs VLC decoding, de-quantization and inverse

discrete cosine transform (IDCT).

D Maximum system clock frequency : CLK = 20 MHz.

D Maximum output bit rate : 1.25 mega-pixels/s on the private

bus.

D 8-bit microprocessor interface.

D Dedicated 8-bit pixel bus

D 5 V DC power supply.

D Package : PLCC68

Figure 1. Application Block Diagram using 29C82

* CCETT License

This data sheet includes information obtained from CCETT

Rev. B (20/05/94)

12 3 4 5 6 7...36

中文翻译

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与S29C82相关器件

型号	品牌	获取价格	描述	数据表
S29C84A	ATMEL	获取价格	Telecom Circuit, 1-Func, CMOS, PQCC68, PLASTIC, LCC-68
S29C84A	TEMIC	获取价格	Telecom Circuit, 1-Func, CMOS, PQCC68, PLASTIC, LCC-68
S29C94	TEMIC	获取价格	Multi Protocol Controller, 1 Channel(s), 0.256MBps, CMOS, PQCC68, PLASTIC, LCC-68
S29C948	TEMIC	获取价格	Telecom IC,
S29C95	TEMIC	获取价格	Multi Protocol Controller, 1 Channel(s), 0.256MBps, CMOS, PQCC68, PLASTIC, LCC-68
S29C96TT	TEMIC	获取价格	Telecom IC,
S29CD016G	SPANSION	获取价格	16 Megabit (512 K x 32-Bit) CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Wr
S29CD016G0J	SPANSION	获取价格	16 Megabit (512 K x 32-Bit) CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Wr
S29CD016G0JDEE005	SPANSION	获取价格	Flash, 512KX32, 67ns, DIE-76
S29CD016G0JDEE014	SPANSION	获取价格	Flash, 512KX32, 67ns, DIE-76

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