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S2018TB PDF预览

S2018TB

更新时间: 2024-09-20 19:07:47
品牌 Logo 应用领域
AMCC 时钟信息通信管理外围集成电路
页数 文件大小 规格书
26页 225K
描述
Crossbar Switch, 17-Bit, BICMOS, PBGA352, 35 X 35 MM, SBGA-352

S2018TB 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:BGA包装说明:LBGA,
针数:352Reach Compliance Code:compliant
ECCN代码:3A001.A.3HTS代码:8542.39.00.01
风险等级:8.63边界扫描:NO
最大时钟频率:100 MHz外部数据总线宽度:17
JESD-30 代码:S-PBGA-B352长度:35 mm
低功率模式:NO端子数量:352
最高工作温度:70 °C最低工作温度:-40 °C
输出数据总线宽度:17封装主体材料:PLASTIC/EPOXY
封装代码:LBGA封装形状:SQUARE
封装形式:GRID ARRAY, LOW PROFILE峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not Qualified座面最大高度:1.67 mm
最大供电电压:3.465 V最小供电电压:3.135 V
标称供电电压:3.3 V表面贴装:YES
技术:BICMOS温度等级:OTHER
端子形式:BALL端子节距:1.27 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:35 mmuPs/uCs/外围集成电路类型:DSP PERIPHERAL, CROSSBAR SWITCH
Base Number Matches:1

S2018TB 数据手册

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®
APPLICATION NOTE  
S2018  
17 X 17 CROSSPOINT SWITCH APPLICATION NOTE  
information pertaining to the S2092 pinout, thermal  
management and connectivity. More importantly, this  
note shows how the S2018 and the S2092 are con-  
nected together when combined.  
APPLICATIONS  
• Internet switches  
• Digital video  
• Digital demultiplexing  
S2018 GENERAL DESCRIPTION  
• Microwave or fiber-optic data distribution  
• High-speed automatic test equipment  
• Datacom or telecom switching  
The S2018 is a very high-speed 17 x 17 differential  
crosspoint switch with full broadcast capability. Any  
of its 17 differential LVPECL input signal pairs can  
be connected to any or all of its 17 differential CML  
output signal pairs.  
PURPOSE  
The purpose of this application note is to describe  
the basic operation of the S2018, a 17 x 17 3.2 Gbps  
Differential Crosspoint Switch. All information  
needed to successfully operate the S2018 are in this  
application note. Included in this note is the configu-  
ration procedure that explains how to program the  
S2018 for new configurations. It also includes a de-  
scription of how to correctly set the programmable  
output swing. Furthermore, information on connectiv-  
ity and thermal management are included to ensure  
proper use of the device.  
The differential 10K LVPECL logic data path makes  
the part ideal for high-speed applications. The differ-  
ential nature of the data path is retained throughout  
the crosspoint structure, to minimize data distortion  
and to handle NRZ data rates up to 3.2 gigabits per  
second. The high speed serial inputs to the S2018  
are internally biased to Vcc -0.84V and have internal  
100 line-to-line termination.  
LVTTL configuration controls simplify interfacing to  
slower speed circuitry. Once a new configuration has  
been entered into the configuration register file, the  
S2018 can be completely reconfigured by pulsing  
the CONFIGN input.  
In addition to the operation of the S2018, this applica-  
tion note also explains how the S2018 and the S2092  
can be used together as illustrated in Figure 1. A  
basic description of the S2092 is given along with  
Figure 1. System Block Diagram  
Serial Data Out  
Serial Data In  
Serial Data In  
DIN0P/N  
DIN1P/N  
DOUT0P/N  
CDR  
CDR  
CDR  
CDR  
Serial Data Out  
DOUT1P/N  
Crosspoint  
Switch  
S2018  
Serial Data Out  
Serial Data Out  
Serial Data In  
Serial Data In  
CDR  
CDR  
CDR  
CDR  
DIN15P/N DOUT15P/N  
DOUT16P/N  
DIN16P/N  
August 7, 2000  
1

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