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S1C17W18F102100 PDF预览

S1C17W18F102100

更新时间: 2024-10-02 22:58:19
品牌 Logo 应用领域
精工 - SEIKO /
页数 文件大小 规格书
12页 659K
描述
16-BIT MCU 4.2MHZ 128KB FLASH 8K

S1C17W18F102100 数据手册

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S1C17W18 (rev1.2)  
16-bit Single Chip Microcontroller  
Low voltage operation from 1.2 V with a single alkaline or silver oxide  
button battery.  
Ultra low standby power consumption (0.3 µA during HALT state in  
super economy mode)  
Embedded A/D converter to support various sensing applications  
DESCRIPTIONS  
The S1C17W18 is a 16-bit MCU that features low-voltage operation from 1.2 V even though Flash memory is included.  
The embedded high-efficiency DC-DC converter generates the constant-voltage to drive the IC with lower power con-  
sumption than 4-bit MCUs. This IC includes a real-time clock, a stopwatch, an LCD driver, a temperature sensor, an A/  
D converter, and a PWM timer capable of being used to generate drive waveforms for a motor driver as well as a high-  
performance 16-bit CPU. It is suitable for battery-driven applications that require an LCD display and a temperature  
measurement function.  
FEATURES  
Model  
S1C17W18  
CPU  
CPU core  
Other  
Seiko Epson original 16-bit RISC CPU core S1C17  
On-chip debugger  
Embedded Flash memory  
Capacity  
128K bytes (for both instructions and data)  
Erase/program count  
Other  
1,000 times (min.) * Programming by the debugging tool ICDmini  
Security function to protect from reading/programming by ICDmini  
On-board programming function using ICDmini  
Flash programming voltage can be generated internally.  
Embedded RAM  
Capacity  
8K bytes  
Embedded display RAM  
Capacity  
96 bytes  
Clock generator (CLG)  
System clock source  
4 sources (IOSC/OSC1/OSC3/EXOSC)  
System clock frequency (operating frequency) 1.1 MHz (max.) VDD = 1.2 to 1.6 V  
4.2 MHz (max.) VDD = 1.6 to 3.6 V  
IOSC oscillator circuit (boot clock source)  
700 kHz (typ.) embedded oscillator  
23 µs (max.) starting time (time from cancelation of SLEEP state to vector table read  
by the CPU)  
OSC1 oscillator circuit  
OSC3 oscillator circuit  
32.768 kHz (typ.) crystal oscillator  
Oscillation stop detection circuit included  
4.2 MHz (max.) crystal/ceramic oscillator  
250, 384, 500 kHz, 1, 2, and 4 MHz-switchable embedded oscillator  
2.1 MHz (max.) CR oscillator (an external R is required)  
4.2 MHz (max.) square or sine wave input  
EXOSC clock input  
Other  
Configurable system clock division ratio  
Configurable system clock used at wake up from SLEEP state  
Operating clock frequency for the CPU and all peripheral circuits is selectable.  
I/O port (PPORT)  
Number of general-purpose I/O ports  
Input/output port: 67 bits (max., 128-pin package or chip)  
56 bits (max., 80-pin package)  
48 bits (max., 64-pin package)  
Output port:  
1 bit (max.)  
Pins are shared with the peripheral I/O.  
63 bits (max., 128-pin package or chip)  
52 bits (max., 80-pin package)  
Number of input interrupt ports  
44 bits (max., 64-pin package)  
Number of ports that support universal port  
multiplexer (UPMUX)  
32 bits (max., 128-pin package or chip)  
29 bits (max., 80-pin package)  
24 bits (max., 64-pin package)  
A peripheral circuit I/O function selected via software can be assigned to each port.  
Timers  
Watchdog timer (WDT)  
Real-time clock (RTCA)  
Generates NMI or watchdog timer reset.  
128–1 Hz counter, second/minute/hour/day/day of the week/month/year counters  
Theoretical regulation function for 1-second correction  
Alarm and stopwatch functions  
16-bit timer (T16)  
4 channels  
Generates the SPIA master clocks and the ADC12A operating clock/trigger signal.  

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