Datasheet > RM75N60LD

RM75N60LD

更新时间： 2024-06-27 12:13:10

品牌	Logo	应用领域
RECTRON		栅
页数	文件大小	规格书
7页	384K
描述
Vdss (V) : 60 V;Id @ 25C (A) : 75.0 A;Rds-on (typ) (mOhms) : 11.5 mOhms;Total Gate Charge (nQ) typ : 50 nQ;Maximum Power Dissipation (W) : 110 W;Vgs(th) (typ) : 3.0 V;Input Capacitance (Ciss) : 2350 pF;Polarity : N-Channel;Mounting Style : SMD/SMT;Package / Case : TO-252(D-PAK)

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RM75N60LD 数据手册

RM75N60LD

N-ChannelEnhancement Mode Power MOSFET

Description

The RM75N60LD uses advanced trench technology and

design to provide excellent R_DS(ON)with low gate charge. It

can be used in a wide variety of applications.

Schematic diagram

General Features

ƽ V_DS=60V,I_D=75A

R_DS(ON)< 11.5mȍ @ V_GS=10V (Typ:9.1mȍ)

ƽ High density cell design for ultra low Rdson

ƽ Fully characterized avalanche voltage and current

ƽ Good stability and uniformity with high E_AS

ƽ Excellent package for good heat dissipation

ƽ Special process technology for high ESD capability

Marking and pin assignment

Application

ƽ Power switching application

ƽ Hard switched and high frequency circuits

ƽ Uninterruptible Power Supply

100% UIS TESTED!

TO-252-2L top view

100% ǻVds TESTED!

Package Marking and Ordering Information

Device Marking

Device

Device Package

Reel Size

Tape width

Quantity

75N60

TO-252-2L

-ꢀ

RM75N60LD

Absolute Maximum Ratings (T_C=25ććunless otherwise noted)

Parameter

Symbol

Limit

Unit

Drain-Source Voltage

Gate-Source Voltage

Drain Current-Continuous

V^DS

±20

V^GS

I_D

Drain Current-Continuous(T_C=100ć)

Pulsed Drain Current

I_D(100ć)

I_DM

300

Maximum Power Dissipation

110

P_D

Derating factor

Single pulse avalanche energy ^{(Note 5)}

0.73

W/ć

E_AS

450

Operating Junction and Storage Temperature Range

-55 To 175

T_J,T_STG

Thermal Characteristic

Thermal Resistance,Junction-to-Case^{(Note 2)}

R_șJC

1.36

ć/W

2017-01

REV:O15

12 3 4 5 6 7

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与RM75N60LD相关器件

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