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RM70P40LD PDF预览

RM70P40LD

更新时间: 2024-10-15 18:09:43
品牌 Logo 应用领域
RECTRON
页数 文件大小 规格书
7页 281K
描述
Vdss (V) : 40 V;Id @ 25C (A) : 70 A;Rds-on (typ) (mOhms) : 7.5 mOhms;Total Gate Charge (nQ) typ :

RM70P40LD 数据手册

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RM70P40LD  
P-Channel Enhancement Mode Power MOSFET  
Description  
The RM70P40LD uses advanced trench technology and  
design to provide excellent RDS(ON) with low gate charge .This  
device is well suited for high current load applications.  
General Features  
ƽ VDS =-40V,ID =-70A  
RDS(ON) <10mΩ @ VGS=-10V  
Schematic diagram  
ƽ High density cell design for ultra low Rdson  
ƽ Fully characterized avalanche voltage and current  
ƽ Good stability and uniformity with high EAS  
ƽ Excellent package for good heat dissipation  
ƽ Special process technology for high ESD capability  
Application  
ƽ Power switch  
Marking and pin assignment  
ƽ Load switch in high current applications  
ƽ DC/DC converters  
ƽ Halogen-free  
ƽ P/N suffix V means AEC-Q101 qualified, e.g:RM70P40LDV  
D
100% UIS TESTED!  
100% ꢀVds TESTED!  
G
S
TO-252-2L top view  
Package Marking and Ordering Information  
Device Marking  
Device  
Device Package  
Reel Size  
Tape width  
Quantity  
70P40  
RM70P40LD  
TO-252-2L  
-  
-
-ꢀ  
Absolute Maximum Ratings (TC=25ćunless otherwise noted)  
Parameter  
Symbol  
VDS  
Limit  
-40  
Unit  
V
Drain-Source Voltage  
Gate-Source Voltage  
Drain Current-Continuous  
20  
V
VGS  
-70  
-49.5  
A
ID  
Drain Current-Continuous(TC=100ć)  
Pulsed Drain Current  
ID (100ć)  
A
-200  
A
IDM  
Maximum Power Dissipation  
130  
W
PD  
Derating factor  
Single pulse avalanche energy (Note 5)  
1.04  
W/ć  
mJ  
EAS  
1012  
Operating Junction and Storage Temperature Range  
-55 To 150  
ć
TJ,TSTG  
2019-02/15  
REV:  
B

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