Datasheet > RM40P40LD

RM40P40LD

更新时间： 2024-10-31 18:09:23

品牌	Logo	应用领域
RECTRON		栅
页数	文件大小	规格书
7页	396K
描述
Vdss (V) : 40 V;Id @ 25C (A) : 40 A;Rds-on (typ) (mOhms) : 14 mOhms;Total Gate Charge (nQ) typ : 7

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RM40P40LD 数据手册

RM40P40LD

P-Channel Enhancement Mode Power MOSFET

Description

The RM40P40LD uses advanced trench technology and

design to provide excellent RDS(ON) with low gate

charge .This device is well suited for high current load

applications.

General Features

ƽ V_DS=-40V,I_D=-40A

Schematic diagram

R_DS(ON)<14mΩ @ V_GS=-10V

ƽ High density cell design for ultra low Rdson

ƽ Fully characterized avalanche voltage and current

ƽ Good stability and uniformity with high E_AS

ƽ Excellent package for good heat dissipation

Application

ƽꢀ Power switching application

ƽꢀ Hard switched and high frequency circuits

ƽꢀ Uninterruptible power supply

Marking and pin assignment

Halogen-free

P/N suffix V means AEC-Q101 qualified, e.g:RM40P40LDV

100% UIS TESTED!

100% ∆Vds TESTED!

TO-252-2L top view

Package Marking and Ordering Information

Device Marking

Device

Device Package

Reel Size

Tape width

Quantity

-ꢀ

40P40

RM40P40LD

TO-252-2L

-ꢀ

Absolute Maximum Ratings (T_C=25ćunless otherwise noted)

Parameter

Symbol

V^DS

Limit

-40

Unit

Drain-Source Voltage

Gate-Source Voltage

Drain Current-Continuous

V^GS

-40

-25

-50

I_D

Drain Current-Continuous(T_C=100ć)

Pulsed Drain Current

I_D(100ć)

I_DM

Maximum Power Dissipation

P_D

Derating factor

Single pulse avalanche energy ^{(Note 5)}

0.53

544

W/ć

E_AS

Operating Junction and Storage Temperature Range

-55 To 175

T_J,T_STG

2019-01/15

REV:B

12 3 4 5 6 7

中文翻译

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