Datasheet > RM40N40LD

RM40N40LD

更新时间： 2024-09-14 18:09:15

品牌	Logo	应用领域
RECTRON		栅
页数	文件大小	规格书
6页	240K
描述
Vdss (V) : 40 V;Id @ 25C (A) : 42 A;Rds-on (typ) (mOhms) : 13.5 mOhms;Total Gate Charge (nQ) typ : 10.7 nQ;Maximum Power Dissipation (W) : 34.7 W;Vgs(th) (typ) : 1.5 V;Input Capacitance (Ciss) : 1314 pF;Polarity : N-Channel;Mounting Style : SMD/SMT;Package / Case : TO-252(D-PAK)

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RM40N40LD 数据手册

RM40N40LD

N-Channel Enhancement Mode Power MOSFET

Description

The RM40N40LD uses advanced trench technology and

design to provide excellent R_DS(ON)with low gate charge. It

can be used in a wide variety of applications.

General Features

V_DS=40V,I_D=42A

Schematic diagram

R_DS(ON)

<11.5mΩ @V_GS

<16.5mΩ @V_GS

=10V

=4.5V

High density cell design for ultra low Rdson

Fully characterized avalanche voltage and current

Good stability and uniformity with high E_AS

Excellent package for good heat dissipation

Special process technology for high ESD capability

Application

Marking and pin assignment

Load switching

Hard switched and high frequency circuits

Uninterruptible power supply

Halogen-free

100% UIS TESTED!

100% ∆Vds TESTED!

TO-252-2L top view

Package Marking and Ordering Information

Device Marking

Device

Device Package

Reel Size

Tape width

Quantity

RM40N40LD

TO-252-2L

40N40

Absolute Maximum Ratings (T_C=25 unless otherwise noted)

Parameter

Symbol

V^DS

Limit

Unit

Drain-Source Voltage

Gate-Source Voltage

Drain Current-Continuous

V^GS

I_D

Drain Current-Continuous(T_C=100

Pulsed Drain Current

)

I_D(100

)

100

34.7

I_DM

Maximum Power Dissipation

Single pulse avalanche energy ^{(Note 5)}

P_D

E_AS

Operating Junction and Storage Temperature Range

-55 To 150

T_J,T_STG

2020-09/83

REV:B

12 3 4 5 6

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