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RHRXH162244K-01V PDF预览

RHRXH162244K-01V

更新时间： 2024-11-28 03:00:51
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 总线驱动器总线收发器逻辑集成电路
页数 文件大小 规格书
17页 474K
描述
Low voltage CMOS 16-bit bus buffer (3-state inverter) with 3.6V tolerant inputs and outputs

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RHRXH162244K-01V 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Obsolete零件包装代码：DFP
包装说明：DFP, FL48,.4,25针数：48
Reach Compliance Code：not_compliantHTS代码：8542.39.00.01
风险等级：5.26Is Samacsys：N
控制类型：ENABLE LOW系列：ALVC/VCX/A
JESD-30 代码：R-CDFP-F48JESD-609代码：e0
长度：15.75 mm逻辑集成电路类型：BUS DRIVER
最大I（ol）：0.012 A位数：4
功能数量：4端口数量：2
端子数量：48最高工作温度：125 °C
最低工作温度：-55 °C输出特性：3-STATE WITH SERIES RESISTOR
输出极性：TRUE封装主体材料：CERAMIC, METAL-SEALED COFIRED
封装代码：DFP封装等效代码：FL48,.4,25
封装形状：RECTANGULAR封装形式：FLATPACK
峰值回流温度（摄氏度）：NOT SPECIFIED电源：2.5/3.3 V
Prop。Delay @ Nom-Sup：5.2 ns传播延迟（tpd）：5.2 ns
认证状态：Not Qualified筛选级别：MIL-PRF-38535 Class V
座面最大高度：2.72 mm子类别：Bus Driver/Transceivers
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：1.8 V
标称供电电压 (Vsup)：2.3 V表面贴装：YES
技术：CMOS温度等级：MILITARY
端子面层：Tin/Lead (Sn/Pb)端子形式：FLAT
端子节距：0.635 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED总剂量：100k Rad(Si) V
宽度：9.65 mmBase Number Matches：1

RHRXH162244K-01V 数据手册

 浏览型号RHRXH162244K-01V的Datasheet PDF文件第2页浏览型号RHRXH162244K-01V的Datasheet PDF文件第3页浏览型号RHRXH162244K-01V的Datasheet PDF文件第4页浏览型号RHRXH162244K-01V的Datasheet PDF文件第5页浏览型号RHRXH162244K-01V的Datasheet PDF文件第6页浏览型号RHRXH162244K-01V的Datasheet PDF文件第7页 
54VCXH162244  
Low voltage CMOS 16-bit bus buffer (3-state inverter)  
with 3.6V tolerant inputs and outputs  
Features  
■ 1.65 to 3.6V inputs and outputs  
■ High speed:  
– t = 3.4ns at V = 3.0 to 3.6V  
PD  
CC  
– t = 3.8ns at V = 2.3 to 2.7V  
PD  
CC  
■ Power down protection on inputs and outputs  
■ Symmetrical output impedance:  
Flat-48  
– |I | = I = 12mA (Min) at V = 3.0V  
OH  
OL  
CC  
Description  
– |I | = I = 8mA (Min) at V = 2.3V  
OH  
OL  
CC  
■ 26Ω serie resistors in outputs  
■ Operating voltage range:  
The 54VCXH162244 is a low voltage CMOS 16  
bit bus buffer (non inverted) fabricated with sub-  
micron silicon gate and five-layer metal wiring  
– V (Opr) = 1.65V to 3.6V  
CC  
2
C MOS technology. It is ideal for low power and  
■ Pin and function compatible with 54 SERIES  
very high speed 1.65 to 3.6V applications; it can  
be interfaced to 3.6V signal environment for both  
inputs and outputs.  
H162244  
■ Bus hold provided on data inputs  
■ Cold spare function  
Any nG output control governs four BUS buffers.  
Output Enable input (nG) tied together gives full  
16-bit operation.  
■ Latch-up performance exceeds  
300mA (JESD 17)  
■ ESD performance:  
When nG is low, the outputs are on. When nG is  
HIGH, the output are in high impedance state.  
– HBM > 2000V  
(MIL STD 883 method 3015); MM > 200V  
This device is designed to be used with 3 state  
memory address drivers, etc. Bus hold on data  
inputs is provided in order to eliminate the need  
for external pull-up or pull-down resistor.  
■ 300KRad Mil1019.6 Condition A, (RHA QML  
qualification extension undergone)  
■ No SEL, no SEU under 72 Mev/cm2/mg LET  
heavy ions irradiation  
The device circuits is including 26Ω series  
resistance in the outputs. These resistors permit  
to reduce line noise in high speed applications.  
■ QML qualified product  
■ SMD 5962-05210  
All inputs and outputs are equipped with  
protection circuits against static discharge, giving  
them 2KV ESD immunity and transient excess  
voltage.  
July 2007  
Rev 5  
1/17  
www.st.com  
17  
1234567...17

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