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RHFLVDS32AK1 PDF预览

RHFLVDS32AK1

更新时间: 2024-11-24 01:13:19
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意法半导体 - STMICROELECTRONICS /
页数 文件大小 规格书
15页 408K
描述
Rad-hard quad LVDS receivers

RHFLVDS32AK1 数据手册

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RHFLVDS32A  
Rad-hard quad LVDS receivers  
Datasheet - production data  
Large input common mode: -4 V to +5 V  
Guaranteed up to 300 krad TID  
SEL immune up to 135 MeV.cm²/mg  
SET/SEU immune up to 32 MeV.cm²/mg  
Description  
The RHFLVDS32A is a quad, low-voltage  
differential signaling (LVDS) receiver specifically  
designed, packaged and qualified for use in  
aerospace environments in a low-power and fast  
data transmission standard.  
Ceramic Flat-16  
The upper metallic lid is  
The circuit features an internal fail-safe function to  
ensure a known state in case of an input short  
circuit or a floating input.  
electrically connected to ground  
All pins have cold spare buffers to ensure they are  
in high impedance when V is tied to GND.  
Features  
CC  
Designed on ST's proprietary CMOS process with  
specific mitigation techniques, the RHFLVDS32A  
achieves “best in the class” for hardness to total  
ionisation dose and heavy ions.  
LVDS input  
CMOS output  
ANSI TIA/EIA-644 compliant  
400 Mbps (200 MHz)  
Cold spare on all pins  
Fail-safe function  
The RHFLVDS32A can operate over a large  
temperature range of -55 °C to +125 °C and it is  
housed in an hermetic Ceramic Flat-16 package.  
3.3 V operating power supply  
4.8 V absolute rating  
Power consumption: 43 mW at 3.3 V  
Hermetic package  
Table 1. Device summary  
Reference  
SMD pin  
Quality level Package Lead finish Mass EPPL(1) Temp. range  
Engineering  
RHFLVDS32AK1  
-
-
Target  
Ceramic  
Flat-16  
-55 °C to  
125 °C  
model  
Gold  
-
RHFLVDS32AK01V 5962F98652  
QML-V Flight  
1. EPPL = ESA preferred part list  
March 2015  
DocID025371 Rev 3  
1/15  
This is information on a product in full production.  
www.st.com  
 

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