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RD48F4400P0VBQEJ PDF预览

RD48F4400P0VBQEJ

更新时间: 2024-11-14 12:46:51
品牌 Logo 应用领域
镁光 - MICRON 闪存内存集成电路
页数 文件大小 规格书
95页 1351K
描述
256Mb and 512Mb (256Mb/256Mb), P30-65nm

RD48F4400P0VBQEJ 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:ObsoleteReach Compliance Code:not_compliant
风险等级:5.86Is Samacsys:N
最长访问时间:100 ns启动块:BOTTOM/TOP
命令用户界面:YES通用闪存接口:YES
数据轮询:NOJESD-30 代码:R-PBGA-B88
JESD-609代码:e0内存密度:536870912 bit
内存集成电路类型:FLASH内存宽度:16
部门数/规模:8, 510端子数量:88
字数:33554432 words字数代码:32000000
最高工作温度:85 °C最低工作温度:-40 °C
组织:32MX16封装主体材料:PLASTIC/EPOXY
封装代码:FBGA封装等效代码:BGA88,8X12,32
封装形状:RECTANGULAR封装形式:GRID ARRAY, FINE PITCH
并行/串行:PARALLEL峰值回流温度(摄氏度):235
电源:1.8,1.8/3.3 V编程电压:1.8 V
认证状态:Not Qualified部门规模:16K,64K
最大待机电流:0.00042 A子类别:Flash Memories
最大压摆率:0.031 mA表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:TIN LEAD SILVER端子形式:BALL
端子节距:0.8 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:30切换位:NO
类型:NOR TYPEBase Number Matches:1

RD48F4400P0VBQEJ 数据手册

 浏览型号RD48F4400P0VBQEJ的Datasheet PDF文件第2页浏览型号RD48F4400P0VBQEJ的Datasheet PDF文件第3页浏览型号RD48F4400P0VBQEJ的Datasheet PDF文件第4页浏览型号RD48F4400P0VBQEJ的Datasheet PDF文件第5页浏览型号RD48F4400P0VBQEJ的Datasheet PDF文件第6页浏览型号RD48F4400P0VBQEJ的Datasheet PDF文件第7页 
256Mb and 512Mb (256Mb/256Mb), P30-65nm  
Features  
Micron Parallel NOR Flash Embedded  
Memory (P30-65nm)  
JS28F256P30B/TFx, RC28F256P30B/TFx, PC28F256P30B/TFx,  
RD48F4400P0VBQEx, RC48F4400P0VB0Ex,  
PC48F4400P0VB0Ex, PF48F4000P0ZB/TQEx  
• Security  
Features  
• High performance  
– One-Time Programmable Register: 64 OTP bits,  
programmed with unique information from Mi-  
cron; 2112 OTP bits available for customer pro-  
gramming  
– 100ns initial access for Easy BGA  
– 110ns initial access for TSOP  
– 25ns 16-word asychronous page read mode  
– 52 MHz (Easy BGA) with zero WAIT states and  
17ns clock-to-data output synchronous burst  
read mode  
– Absolute write protection: VPP = VSS  
– Power-transition erase/program lockout  
– Individual zero-latency block locking  
– Individual block lock-down  
– Password access  
• Software  
– 4-, 8-, 16-, and continuous word options for burst  
mode  
– Buffered enhanced factory programming (BEFP)  
at 2MB/s (TYP) using a 512 word buffer  
– 1.8V buffered programming at 1.14MB/s (TYP)  
using a 512 word buffer  
25μs (TYP) program suspend  
25μs (TYP) erase suspend  
– Flash Data Integrator optimized  
– Basic command set and extended function Inter-  
face (EFI) command set compatible  
– Common flash interface  
• Architecture  
– MLC: highest density at lowest cost  
– Asymmetrically blocked architecture  
– Four 32-KB parameter blocks: top or bottom con-  
figuration  
– 128KB main blocks  
– Blank check to verify an erased block  
• Voltage and power  
• Density and Packaging  
– 56-lead TSOP package (256Mb only)  
– 64-ball Easy BGA package (256Mb, 512Mb)  
– QUAD+ and SCSP packages (256Mb, 512Mb)  
– 16-bit wide data bus  
• Quality and Reliabilty  
– VCC (core) voltage: 1.7V to 2.0V  
– VCCQ (I/O) voltage: 1.7V to 3.6V  
– Standy current: 65µA (TYP) for 256Mb  
– 52 MHz continuous synchronous read current:  
21mA (TYP), 24mA (MAX)  
– JESD47E compliant  
– Operating temperature: –40 °C to +85 °C  
– Minimum 100,000 erase cycles per block  
– 65nm process technology  
PDF: 09005aef84566799  
p30_65nm_256Mb-512mb.pdf - Rev. A 1/13 EN  
Micron Technology, Inc. reserves the right to change products or specifications without notice.  
1
© 2013 Micron Technology, Inc. All rights reserved.  
Products and specifications discussed herein are subject to change by Micron without notice.  

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