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RD48F4000L0ZTQ0 PDF预览

RD48F4000L0ZTQ0

更新时间: 2024-11-15 05:07:51
品牌 Logo 应用领域
英特尔 - INTEL /
页数 文件大小 规格书
102页 1719K
描述
Flash, 16MX16, PBGA80, 8 X 10 MM, 1.20 MM HEIGHT, SCSP-88/80

RD48F4000L0ZTQ0 数据手册

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Intel StrataFlash® Wireless Memory  
(L30)  
28F640L30, 28F128L30, 28F256L30  
Datasheet  
Product Features  
High performance Read-While-Write/Erase  
— 85 ns initial access  
Security  
— OTP space:  
• 64 unique factory device identifier bits  
• 64 user-programmable OTP bits  
— 52 MHz with zero wait state, 17 ns clock-to-  
data output synchronous-burst mode  
— 25 ns asynchronous-page mode  
— 4-, 8-, 16-, and continuous-word burst mode  
— Burst suspend  
— Programmable WAIT configuration  
— Buffered Enhanced Factory Programming  
(BEFP) at 5 µs/byte (Typ)  
• Additional 2048 user-programmable OTP bits  
— Absolute write protection: VPP = GND  
— Power-transition erase/program lockout  
— Individual zero-latency block locking  
— Individual block lock-down  
Software  
— 1.8 V low-power buffered programming at  
— 20 µs (Typ) program suspend  
7 µs/byte (Typ)  
— 20 µs (Typ) erase suspend  
Architecture  
— Intel® Flash Data Integrator (FDI) optimized  
— Basic Command Set (BCS) and Extended  
Command Set (ECS) compatible  
— Asymmetrically-blocked architecture  
— Multiple 8-Mbit partitions: 64-Mbit and 128-  
Mbit devices  
— Common Flash Interface (CFI) capable  
— Multiple 16-Mbit partitions: 256-Mbit devices  
— Four 16-Kword parameter blocks: top or  
bottom configurations  
Quality and Reliability  
— Expanded temperature: –25° C to +85° C  
— Minimum 100,000 erase cycles per block  
— ETOX™ VIII process technology (0.13 µm)  
Density and Packaging  
— 64-Kword main blocks  
— Dual-operation: Read-While-Write (RWW) or  
Read-While-Erase (RWE)  
— 64-, 128-, and 256-Mbit density in VF BGA  
packages  
— 128/0 and 256/0 Density in Stacked-CSP  
— 16-bit wide data bus  
— Status register for partition and device status  
Power  
— VCC (core) = 1.7 V - 2.0 V  
— VCCQ (I/O) = 2.2 V - 3.3 V  
— Standby current: 30 µA (Typ) for 256-Mbit  
— 4-Word synchronous read current: 16 mA (Typ)  
at 52 MHz  
— Automatic Power Savings mode  
The Intel StrataFlash® wireless memory (L30) product is the latest generation of Intel  
StrataFlash® memory devices featuring flexible, multiple-partition, dual operation. It provides  
high performance synchronous-burst read mode and asynchronous read mode using 1.8 V low-  
voltage, multi-level cell (MLC) technology.  
The multiple-partition architecture enables background programming or erasing to occur in one  
partition while code execution or data reads take place in another partition. This dual-operation  
architecture also allows a system to interleave code operations while program and erase  
operations take place in the background.  
The L30 device is manufactured using Intel® 0.13 µm ETOX™ VIII process technology. It is  
available in industry-standard chip scale packaging.  
Order Number: 251903, Revision: 008  
January 2005  

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