Datasheet > RD38F4050L0ZTQ1

RD38F4050L0ZTQ1

更新时间： 2024-11-11 09:22:03

品牌	Logo	应用领域
恒忆 - NUMONYX		静态存储器内存集成电路
页数	文件大小	规格书
68页	988K
描述
Memory Circuit, Flash+PSRAM, Hybrid, PBGA88,

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中文翻译

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数据手册

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RD38F4050L0ZTQ1 数据手册

Numonyx™ StrataFlash Wireless Memory

(L18 SCSP)

768-Mbit L18 Family with Synchronous PSRAM

Datasheet

Product Features

Device Architecture

Flash Performance

— Flash Die Density: 128 or 256-Mbit

— PSRAM Die Density: 32 or 64-Mbit

— x16 Non-Mux or ADMux I/O Interface Option

— Bottom or Top Flash Parameter

Configuration

Device Voltage

— Core: V_CC= 1.8 V

— I/O: V_CCQ= 1.8 V

Device Packaging

— Ballout: QUAD+ (88 Balls)

— Area: 8x10 mm to 11x13 mm

— Height: 1.2 mm to 1.4 mm

PSRAM Performance

— 85 ns Initial Read Access;

25 ns Asynchronous Page-Mode Read

— Up to 54 MHz with 14 ns Clock-to-Data

Output Synchronous Burst-Mode Read

— Buffered Enhanced Factory Programming

(BEFP): 5 µs/byte (typ.)

— Write-buffer program: 7 µs/Byte (typ.)

Flash Architecture

— Read-While-Write/Erase

— Asymmetrical blocking structure

— 8-Mbit or 16-Mbit partition sizes

— 16-Kword parameter blocks (Top or

Bottom); 64-Kword main blocks

— 2-Kbit One-Time Programmable Protection

— Zero-latency block locking

— Absolute write protection with block lock

using F-VPP and F-WP#

Flash Software

— Numonyx™ FDI, Numonyx™ PSM, and

Numonyx™ VFM

— Common Flash Interface

— 70 ns Initial Read Access;

20 ns Asynchronous Page-Mode Read

— Up to 54 MHz with 9 ns Clock-to-Data

Synchronous Burst-Mode Reads and Writes

— Configurable 4-, 8-, 16- and Continuous-

Word Burst-Length Reads and Writes

— Partial-Array Self and Temperature-

Compensated Refresh

— Programmable Output Impedance

— Basic and Extended Flash Command Set

Quality and Reliability

— Extended Temperature –25 °C to +85 °C

— Minimum 100K Flash Block Erase cycles

— 130 nm ETOX™ VIII Flash Technology

314476-05

November 2007

12 3 4 5 6 7...68

中文翻译

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