Datasheet > RA6M3

RA6M3

更新时间： 2023-12-20 18:46:18

品牌	Logo	应用领域
瑞萨 - RENESAS		以太网控制器微控制器
页数	文件大小	规格书
115页	1443K
描述
带有 USB 高速、以太网和 TFT 控制器的 120 MHz 32 位微控制器

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RA6M3 数据手册

Datasheet

R01DS0358EJ0120

Rev.1.20

RA6M3 Group

Datasheet

Feb 3, 2023

Leading performance 120-MHz Arm^®Cortex^®-M4 core, up to 2-MB code flash memory, 640-KB SRAM, Graphics LCD

Controller, 2D Drawing Engine, Capacitive Touch Sensing Unit, Ethernet MAC Controller with IEEE 1588 PTP, USB 2.0

High-Speed, USB 2.0 Full-Speed, SDHI, Quad SPI, security and safety features, and advanced analog.

Features

■ Arm Cortex-M4 Core with Floating Point Unit (FPU)

 Armv7E-M architecture with DSP instruction set

 Maximum operating frequency: 120 MHz

■ System and Power Management

 Low power modes

 Realtime Clock (RTC) with calendar and VBATT support

 Event Link Controller (ELC)

 DMA Controller (DMAC) × 8

 Support for 4-GB address space

 On-chip debugging system: JTAG, SWD, and ETM

 Boundary scan and Arm Memory Protection Unit (Arm MPU)

 Data Transfer Controller (DTC)

 Key Interrupt Function (KINT)

 Power-on reset

■ Memory

 Up to 2-MB code flash memory (40 MHz zero wait states)

 64-KB data flash memory (125,000 erase/write cycles)

 Up to 640-KB SRAM

 Low Voltage Detection (LVD) with voltage settings

■ Security and Encryption

 AES128/192/256

 3DES/ARC4

 SHA1/SHA224/SHA256/MD5

 GHASH

 RSA/DSA/ECC

 True Random Number Generator (TRNG)

 Flash Cache (FCACHE)

 Memory Protection Units (MPU)

 Memory Mirror Function (MMF)

 128-bit unique ID

■ Connectivity

 Ethernet MAC Controller (ETHERC)

 Ethernet DMA Controller (EDMAC)

 Ethernet PTP Controller (EPTPC)

 USB 2.0 High-Speed (USBHS) module

- On-chip transceiver with voltage regulator

- Compliant with USB Battery Charging Specification 1.2

 USB 2.0 Full-Speed (USBFS) module

- On-chip transceiver with voltage regulator

 Serial Communications Interface (SCI) with FIFO × 10

 Serial Peripheral Interface (SPI) × 2

 I²C bus interface (IIC) × 3

 Controller Area Network (CAN) × 2

 Serial Sound Interface Enhanced (SSIE) × 2

 SD/MMC Host Interface (SDHI) × 2

 Quad Serial Peripheral Interface (QSPI)

 IrDA interface

■ Human Machine Interface (HMI)

 Graphics LCD Controller (GLCDC)

 JPEG codec

 2D Drawing Engine (DRW)

 Capacitive Touch Sensing Unit (CTSU)

 Parallel Data Capture Unit (PDC)

■ Multiple Clock Sources

 Main clock oscillator (MOSC) (8 to 24 MHz)

 Sub-clock oscillator (SOSC) (32.768 kHz)

 High-speed on-chip oscillator (HOCO) (16/18/20 MHz)

 Middle-speed on-chip oscillator (MOCO) (8 MHz)

 Low-speed on-chip oscillator (LOCO) (32.768 kHz)

 IWDT-dedicated on-chip oscillator (15 kHz)

 Clock trim function for HOCO/MOCO/LOCO

 Clock out support

 Sampling Rate Converter (SRC)

 External address space

- 8-bit or 16-bit bus space is selectable per area

- SDRAM support

■ General-Purpose I/O Ports

 Up to 133 input/output pins

- Up to 9 CMOS input

- Up to 124 CMOS input/output

- Up to 21 input/output 5 V tolerant

- Up to 18 high current (20 mA)

■ Analog

 12-bit A/D Converter (ADC12) with 3 sample-and-hold circuits

each × 2

■ Operating Voltage

 VCC: 2.7 to 3.6 V

 12-bit D/A Converter (DAC12) × 2

 High-Speed Analog Comparator (ACMPHS) × 6

 Programmable Gain Amplifier (PGA) × 6

 Temperature Sensor (TSN)

■ Operating Temperature and Packages

 Ta = -40°C to +105°C

■ Timers

- 176-pin BGA (13 mm × 13 mm, 0.8 mm pitch)

- 176-pin LQFP (24 mm × 24 mm, 0.5 mm pitch)

- 145-pin LGA (7 mm × 7 mm, 0.5 mm pitch)

- 144-pin LQFP (20 mm × 20 mm, 0.5 mm pitch)

- 100-pin LQFP (14 mm × 14 mm, 0.5 mm pitch)

 General PWM Timer 32-bit Enhanced High Resolution

(GPT32EH) × 4

 General PWM Timer 32-bit Enhanced (GPT32E) × 4

 General PWM Timer 32-bit (GPT32) × 6

 Low Power Asynchronous General-Purpose Timer (AGT) × 2

 Watchdog Timer (WDT)

■ Safety

 Error Correction Code (ECC) in SRAM

 SRAM parity error check

 Flash area protection

 ADC self-diagnosis function

 Clock Frequency Accuracy Measurement Circuit (CAC)

 Cyclic Redundancy Check (CRC) calculator

 Data Operation Circuit (DOC)

 Port Output Enable for GPT (POEG)

 Independent Watchdog Timer (IWDT)

 GPIO readback level detection

 Register write protection

 Main oscillator stop detection

 Illegal memory access

R01DS0358EJ0120 Rev.1.20

Feb 3, 2023

Page 1 of 115

12 3 4 5 6 7...115

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