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R1LV3216ISD-5SI PDF预览

R1LV3216ISD-5SI

更新时间: 2024-11-21 20:11:07
品牌 Logo 应用领域
瑞萨 - RENESAS 静态存储器光电二极管内存集成电路
页数 文件大小 规格书
18页 195K
描述
2M X 16 STANDARD SRAM, 70 ns, PDSO52, 10.79 X 10.49 MM, 0.40 MM PITCH, MICRO, PLASTIC, TSOP2-52

R1LV3216ISD-5SI 技术参数

生命周期:Transferred零件包装代码:TSOP2
包装说明:10.79 X 10.49 MM, 0.40 MM PITCH, MICRO, PLASTIC, TSOP2-52针数:52
Reach Compliance Code:unknownECCN代码:3A991.B.2.A
HTS代码:8542.32.00.41风险等级:5.77
最长访问时间:70 ns备用内存宽度:8
JESD-30 代码:R-PDSO-G52长度:10.79 mm
内存密度:33554432 bit内存集成电路类型:STANDARD SRAM
内存宽度:16功能数量:1
端子数量:52字数:2097152 words
字数代码:2000000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:2MX16封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH并行/串行:PARALLEL
认证状态:Not Qualified座面最大高度:1.2 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2.7 V
标称供电电压 (Vsup):3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.4 mm
端子位置:DUAL宽度:8.89 mm
Base Number Matches:1

R1LV3216ISD-5SI 数据手册

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Preliminary  
R1LV3216R Series  
32Mb Advanced LPSRAM (2M word x 16bit / 4M word x 8bit)  
REJ03C0367-0001  
Preliminary  
Rev.0.01  
2008.03.24  
Description  
The R1LV3216R Series is a family of low voltage 32-Mbit static RAMs organized as 2,097,152-word by  
16-bit, fabricated by Renesas’s high-performance 0.15um CMOS and TFT technologies.  
The R1LV3216R Series is suitable for memory applications where a simple interfacing, battery operating  
and battery backup are the important design objectives.  
The R1LV3216R Series is provided in 48-pin thin small outline package [TSOP (I): 12mm x 20mm with pin  
pitch of 0.5mm] and 52-pin micro thin small outline package [µTSOP (II): 10.79mm x 10.49mm with pin pitch  
of 0.4mm]. It gives the best solution for compaction of mounting area as well as flexibility of wiring pattern of  
printed circuit boards.  
Features  
Single 2.7~3.6V power supply  
Small stand-by current: 4 µA (3.0V, typical)  
No clocks, No refresh  
All inputs and outputs are TTL compatible.  
Easy memory expansion by CS1#, CS2, LB# and UB#  
Common Data I/O  
Three-state outputs: OR-tie Capability  
OE# prevents data contention on the I/O bus  
Ordering Information  
Type No.  
Access time  
55 ns*1  
70 ns  
Package  
R1LV3216RSA-5S%  
R1LV3216RSA-7S%  
R1LV3216RSD-5S%  
R1LV3216RSD-7S%  
12mm x 20mm 48-pin plastic TSOP (I)  
(normal-bend type) (48P3R)  
350 mil 52-pin plastic μ-TSOP (II)  
(normal-bend type) (52PTG)  
55 ns*1  
70 ns  
Note1. 55ns parts can be supported under the condition of the input timing limitation toward SRAM on customer’s  
system. Please contact our sales office in your region, in case of the inquiry for 55ns parts.  
% - Temperature version; see table below  
%
R
I
Temperature Range  
0 ~ +70 °C  
-40 ~ +85 °C  
REJ03C0367-0001, Rev.0.01, 2008.03.24  
Page 1 of 16  

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