QS6612 PRELIMINARY
10BaseT/100BaseTX
Ethernet MII Transceiver
for Category 5
QS6612
Q
PRELIMINARY
Q
UALITY
S
EMICONDUCTOR, NC.
I
Twisted Pair Cable
DESCRIPTION
FEATURES/BENEFITS
• Single chip 5V 10BaseT/100BaseTX transceiver
with MII interface and Auto-Negotiation
• Built-in transmit wave-shaping, receive filters and
adaptive equalization eliminates the need for
external filters
• Built-in 10BaseT and 100BaseTX multiplexing
eliminates external relays or switches
• High speed Phase Lock Loop for low-jitter clock
recovery
• Requires one external 25MHz crystal only
• 10BaseT/100BaseTX half- and full-duplex
operation
• Low latency bit budget supports type II repeater
design for MII or symbol wide interfaces
• 25MHz free-running clock output for controller
• IEEE 802.3u compliant MII and Serial Manage-
ment standard interface
• IEEE 802.3u compliant Auto-Negotiation for auto
10/100Mbps speed selection
• 4B/5B Encoder/Decoder and Stream Cipher
Scrambler/Descrambler for 100BaseTX
• Programmable scrambler seed reduces EMI in
multi-port repeater design
• Manchester ENDEC and 10BaseT
• Optional symbol wide interface
• MLT-3 transceiver with DC restoration for base-
line wander compensation for 100BaseTX-mode
• PHY isolate, local/remote loop-back, and 4 LED
drivers
The QS6612 provides all of the IEEE 802.3u
100BaseTXandISO8802-310BaseTPhysicalLayer
(PHY)functionsneededformostworkstations,hubs,
bridge,router,andswitchapplications.Itcanoperate
as a 100Mbps only device, or as a dual speed 10/
100Mbps device with built-in Auto-Negotiation for
speed selection. The QS6612 supports the standard
Media Independent Interface (MII) for glueless
interface with 10/100 Ethernet Media Access
Controllers (MAC), or MII-based repeaters. The
QS6612 supports an optional symbol wide interface
for Type II repeater applications.
The MII supports a 25MHz transfer rate for
100BaseTX and 2.5MHz transfer rate for 10BaseT.
The built-in IEEE 802.3u Auto-Negotiation feature
automatically selects internal 10BaseT or
100BaseTX, full or half-duplex, as a result of nego-
tiation between the station and its link partner.
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The QS6612 supports half and full-duplex operation
at both 10Mbps and 100Mbps speeds. It complies
with ANSI X3T9 TP-PMD and includes MLT-3
Encoder/Decoder and Stream Cipher scrambler/
de-scramblerfunctionsfor100BaseTX.TheQS6612
supports Category 5 Unshielded Twisted Pair and
Type 1 Shielded Twisted Pair wiring. The on-chip
Serial Management Interface features the Basic and
Extended register set. The 4B/5B Encoder and
Decoder are also included.
• Full CMOS with low power requirements
• Small footprint 64-pin LQFP (10x10x1.4mm)
package
Figure 1. Functional Block Diagram
Manchester
10BaseT
Encoder/Decoder
Transceiver
MII
Interface
Auto-
Negotiation
10BaseT
Filters
To Cable
Parallel PLL Clock NRZI to 100BaseTX
to NRZI Generation MLT-3 Filters
4B to 5B
Scramble
10/100Mbps
to Comm
Controller
NRZI to PLL Clock MLT-3 DC Restore
Parallel Recovery to NRZI Adap Equal
5B to 4B Descramble
MDSN-00002-01
JULY 31, 1998
QUALITY SEMICONDUCTOR, INC.
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