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QS6612

更新时间： 2024-11-21 20:10:11
品牌 Logo 应用领域
艾迪悌 - IDT 以太网：16GBASE-T电信电信集成电路
页数 文件大小 规格书
34页 151K
描述
Ethernet Transceiver, 1-Trnsvr, CMOS, PQFP64

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中文翻译

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QS6612 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：QFP针数：64
Reach Compliance Code：unknown风险等级：5.91
数据速率：100000 MbpsJESD-30 代码：S-PQFP-G64
JESD-609代码：e0端子数量：64
收发器数量：1最高工作温度：70 °C
最低工作温度：封装主体材料：PLASTIC/EPOXY
封装代码：QFP封装等效代码：QFP64,.47SQ,20
封装形状：SQUARE封装形式：FLATPACK
电源：5 V认证状态：Not Qualified
子类别：Network Interfaces标称供电电压：5 V
表面贴装：YES技术：CMOS
电信集成电路类型：ETHERNET TRANSCEIVER温度等级：COMMERCIAL
端子面层：Tin/Lead (Sn/Pb)端子形式：GULL WING
端子节距：0.5 mm端子位置：QUAD
Base Number Matches：1

QS6612 数据手册

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10BaseT/100BaseTX  
Ethernet MII Transceiver  
for Category 5  
QS6612  
Q
PRELIMINARY  
Q
UALITY  
S
EMICONDUCTOR, NC.  
I
Twisted Pair Cable  
DESCRIPTION  
FEATURES/BENEFITS  
• Single chip 5V 10BaseT/100BaseTX transceiver  
with MII interface and Auto-Negotiation  
• Built-in transmit wave-shaping, receive filters and  
adaptive equalization eliminates the need for  
external filters  
• Built-in 10BaseT and 100BaseTX multiplexing  
eliminates external relays or switches  
• High speed Phase Lock Loop for low-jitter clock  
recovery  
• Requires one external 25MHz crystal only  
• 10BaseT/100BaseTX half- and full-duplex  
operation  
• Low latency bit budget supports type II repeater  
design for MII or symbol wide interfaces  
• 25MHz free-running clock output for controller  
• IEEE 802.3u compliant MII and Serial Manage-  
ment standard interface  
• IEEE 802.3u compliant Auto-Negotiation for auto  
10/100Mbps speed selection  
• 4B/5B Encoder/Decoder and Stream Cipher  
Scrambler/Descrambler for 100BaseTX  
• Programmable scrambler seed reduces EMI in  
multi-port repeater design  
• Manchester ENDEC and 10BaseT  
• Optional symbol wide interface  
• MLT-3 transceiver with DC restoration for base-  
line wander compensation for 100BaseTX-mode  
• PHY isolate, local/remote loop-back, and 4 LED  
drivers  
The QS6612 provides all of the IEEE 802.3u  
100BaseTXandISO8802-310BaseTPhysicalLayer  
(PHY)functionsneededformostworkstations,hubs,  
bridge,router,andswitchapplications.Itcanoperate  
as a 100Mbps only device, or as a dual speed 10/  
100Mbps device with built-in Auto-Negotiation for  
speed selection. The QS6612 supports the standard  
Media Independent Interface (MII) for glueless  
interface with 10/100 Ethernet Media Access  
Controllers (MAC), or MII-based repeaters. The  
QS6612 supports an optional symbol wide interface  
for Type II repeater applications.  
The MII supports a 25MHz transfer rate for  
100BaseTX and 2.5MHz transfer rate for 10BaseT.  
The built-in IEEE 802.3u Auto-Negotiation feature  
automatically selects internal 10BaseT or  
100BaseTX, full or half-duplex, as a result of nego-  
tiation between the station and its link partner.  
4
The QS6612 supports half and full-duplex operation  
at both 10Mbps and 100Mbps speeds. It complies  
with ANSI X3T9 TP-PMD and includes MLT-3  
Encoder/Decoder and Stream Cipher scrambler/  
de-scramblerfunctionsfor100BaseTX.TheQS6612  
supports Category 5 Unshielded Twisted Pair and  
Type 1 Shielded Twisted Pair wiring. The on-chip  
Serial Management Interface features the Basic and  
Extended register set. The 4B/5B Encoder and  
Decoder are also included.  
• Full CMOS with low power requirements  
• Small footprint 64-pin LQFP (10x10x1.4mm)  
package  
Figure 1. Functional Block Diagram  
Manchester  
10BaseT  
Encoder/Decoder  
Transceiver  
MII  
Interface  
Auto-  
Negotiation  
10BaseT  
Filters  
To Cable  
Parallel PLL Clock NRZI to 100BaseTX  
to NRZI Generation MLT-3 Filters  
4B to 5B  
Scramble  
10/100Mbps  
to Comm  
Controller  
NRZI to PLL Clock MLT-3 DC Restore  
Parallel Recovery to NRZI Adap Equal  
5B to 4B Descramble  
MDSN-00002-01  
JULY 31, 1998  
QUALITY SEMICONDUCTOR, INC.  
1
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