Datasheet > QS532806SO8

QS532806SO8

更新时间： 2023-06-15 00:00:00

品牌	Logo	应用领域
艾迪悌 - IDT		光电二极管
页数	文件大小	规格书
6页	95K
描述
Low Skew Clock Driver, 0 True Output(s), 5 Inverted Output(s), CMOS, PDSO20, SOIC-20

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QS532806SO8 数据手册

QS532806/A

GUARANTEEDLOWSKEW3.3VCMOSCLOCKDRIVER/BUFFER

INDUSTRIALTEMPERATURERANGE

GUARANTEED LOW SKEW

QS532806/A

3.3V CMOS CLOCK

DRIVER/BUFFER

FEATURES:

DESCRIPTION

−

JEDEC compatible LVTTL level

10 low skew clock outputs

Monitor output

Clock inputs are 5V tolerant

Pinout and function compatible with QS5806

25Ω on-chip resistors for low noise

Input hysteresis for better noise margin

Guaranteed low skew:

TheQS532806clockdriver/buffercircuitcanbeusedforclockbuffering

schemes where lowskewis a keyparameter. The QS532806offers two

banks of five inverting outputs. Designed in IDT's proprietary CMOS

process,these devices provide lowpropagationdelaybufferingwithon-

chipskewof0.7ns forsame-transition,same-banksignals.

TheQS532806has on-chipseries terminationresistors forlowernoise

clocksignals.The series resistorversions are recommendedfordriving

unterminatedlineswithcapacitiveloadingandothernoisesensitiveclock

distributioncircuits.These clockbufferproducts are designedforuse in

high-performanceworkstations,embeddedandpersonalcomputingsys-

tems. Several devices can be used in parallel or scattered throughout a

systemforguaranteedlowskew,system-wideclockdistributionnetworks.

•

0.7ns output skew (same bank)

0.9ns output skew (different bank)

1ns part-to-part skew

−

Std. and A speed grades

Available in QSOP and SOIC packages

FUNCTIONALBLOCKDIAGRAM

OEA

INA

OA5 - OA1

MON

INB

OB5 - OB1

OEB

INDUSTRIAL TEMPERATURE RANGE

SEPTEMBER 2000

1999 Integrated Device Technology, Inc.

DSC-5783/-

12 3 4 5 6

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