Datasheet > Q67100-Q2330

Q67100-Q2330

更新时间： 2024-09-26 23:06:07

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Q67100-Q2330 数据手册

8M × 32-Bit EDO-DRAM Module

HYM328025S/GS-50/-60

• SIMM modules with 8 388 608 words by 32-bit organization

for PC main memory applications

• Fast access and cycle time

50 ns access time

84 ns cycle time (-50 version)

60 ns access time

104 ns cycle time (-60 version)

• Hyper page mode (EDO) capability

20 ns cycle time (-50 version)

25 ns cycle time (-60 version)

• Single + 5 V (± 10 %) supply

• Low power dissipation

max. 5280 mW active (-50 version)

max. 4840 mW active (-60 version)

CMOS – 88 mW standby

TTL

–176 mW standby

• CAS-before-RAS refresh

RAS-only-refresh

Hidden-refresh

• 16 decoupling capacitors mounted on substrate

• All inputs, outputs and clocks fully TTL compatible

• 72 pin Single in-Line Memory Module (L-SIM-72-15) with 25.40 mm height

• Utilizes sixteen 4Mx4-DRAMs in SOJ packages

• 2048 refresh cycles / 32 ms

• Optimized for use in byte-write non-parity applications

• Tin-Lead contact pads (S- version)

• Gold contact pads (GS -version)

Semiconductor Group

9.96

12 3 4 5 6 7...11

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