生命周期: | Obsolete | 包装说明: | DIP, |
Reach Compliance Code: | compliant | 风险等级: | 5.67 |
Is Samacsys: | N | 其他特性: | SEATED HEIGHT CALCULATED |
模拟集成电路 - 其他类型: | PHASE DETECTOR | JESD-30 代码: | R-PDIP-T16 |
长度: | 20.32 mm | 功能数量: | 1 |
端子数量: | 16 | 最高工作温度: | 70 °C |
最低工作温度: | 封装主体材料: | PLASTIC/EPOXY | |
封装代码: | DIP | 封装形状: | RECTANGULAR |
封装形式: | IN-LINE | 座面最大高度: | 4.58 mm |
最大供电电压 (Vsup): | 5.5 V | 最小供电电压 (Vsup): | 4.5 V |
标称供电电压 (Vsup): | 5 V | 表面贴装: | NO |
温度等级: | COMMERCIAL | 端子形式: | THROUGH-HOLE |
端子节距: | 2.54 mm | 端子位置: | DUAL |
宽度: | 7.62 mm | Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
PT7V4050TACCA22.579/23.7285 | DIODES |
获取价格 |
PLL/Frequency Synthesis Circuit, | |
PT7V4050TACCA28.000/23.7285 | DIODES |
获取价格 |
PLL/Frequency Synthesis Circuit, | |
PT7V4050TACCA38.880/12.500 | DIODES |
获取价格 |
PLL/Frequency Synthesis Circuit, | |
PT7V4050TACCA41.943/22.368 | DIODES |
获取价格 |
PLL/Frequency Synthesis Circuit, | |
PT7V4050TACCA49.408/19.440 | DIODES |
获取价格 |
PLL/Frequency Synthesis Circuit, | |
PT7V4050TACFA41.943/22.368 | DIODES |
获取价格 |
PLL/Frequency Synthesis Circuit, | |
PT7V4050TACFB22.579/15.360 | DIODES |
获取价格 |
PLL/Frequency Synthesis Circuit, | |
PT7V4050TACFB44.736/24.704 | DIODES |
获取价格 |
PLL/Frequency Synthesis Circuit, | |
PT7V4050TACGA13.000/19.440 | DIODES |
获取价格 |
PLL/Frequency Synthesis Circuit, | |
PT7V4050TACGA22.579/16.665 | DIODES |
获取价格 |
PLL/Frequency Synthesis Circuit, |