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PT7A4408 PDF预览

PT7A4408

更新时间: 2024-11-18 23:29:39
品牌 Logo 应用领域
其他 - ETC /
页数 文件大小 规格书
27页 181K
描述
T1/E1/OC3 System Synchronizer?

PT7A4408 数据手册

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Data Sheet  
PT7A4408/4408L  
T1/E1/OC3 System Synchronizer  
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Features  
Introduction  
• Supports AT&T TR62411 Stratum 4 and  
Stratum 4 Enhanced for DS1 interfaces and for  
ETSI ETS 300 011, TBR 4, TBR 12, and TBR  
13 for E1 interfaces  
PT7A4408/4408L employs a digital phase-locked  
loop (DPLL) to provide timing and synchronizing  
signals for multitrunk T1 and E1 primary rate  
transmission links, and for STS-3/OC3 links. The ST-  
BUS clock and framing signals are phase-locked to  
input reference signals of either 2.048 MHz,  
1.544MHz or 8 kHz.  
• Supports ITU-T G.812 Type IV clocks for  
1.544kbit/s interfaces and 2.048kbit/s interface  
Provides C1.5, C3, C2, C4, C8, C6, C16 and C19  
output clock signals  
Provides five kinds of 8kHz ST-BUS framing  
signals  
The PT7A4408/4408L meets the requirements for  
AT&T TR62411 Stratum 4 and Stratum 4 Enhanced,  
and ETSI ETS 300 011 in jitter tolerance, jitter trans-  
fer, intrinsic jitter, frequency accuracy, capture range,  
phase slope, etc.  
Input reference frequency 1.544MHz, 2.048MHz  
or 8kHz selectable  
Normal or Free-Run operating modes available  
Power supply: 5V (4408) and 3.3V(4408L)  
The PT7A4408/4408L operates in Normal or Free-  
run Mode.  
Applications  
• Synchronization and timing control for multitrunk  
T1 and E1 systems, STS-3/OC3 systems  
Ordering Information  
Part Number  
Package  
ST-BUS clock and frame pulse sources  
Primary Trunk Rate Converters  
PT7A4408J  
44-Pin PLCC  
44-Pin PLCC  
PT7A4408LJ  
PT0106(09/02)  
Ver:0  
1

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