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PT5022S PDF预览

PT5022S

更新时间: 2024-01-16 17:46:42
品牌 Logo 应用领域
德州仪器 - TI 稳压器开关输出元件输入元件
页数 文件大小 规格书
6页 140K
描述
POSITIVE INPUT/NEGATIVE OUTPUT INTEGRATED SWITCHING REGULATOR

PT5022S 技术参数

生命周期:TransferredReach Compliance Code:unknown
风险等级:5.71模拟集成电路 - 其他类型:SWITCHING REGULATOR
控制模式:VOLTAGE-MODEJESD-30 代码:R-XSFM-T3
功能数量:1端子数量:3
最大输出电流:1 A封装主体材料:UNSPECIFIED
封装等效代码:SIP3,.38TB封装形状:RECTANGULAR
封装形式:FLANGE MOUNT认证状态:Not Qualified
子类别:Switching Regulator or Controllers表面贴装:NO
最大切换频率:1200 kHz技术:HYBRID
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:SINGLEBase Number Matches:1

PT5022S 数据手册

 浏览型号PT5022S的Datasheet PDF文件第2页浏览型号PT5022S的Datasheet PDF文件第3页浏览型号PT5022S的Datasheet PDF文件第4页浏览型号PT5022S的Datasheet PDF文件第5页浏览型号PT5022S的Datasheet PDF文件第6页 
PT5020 Series  
Positive Input/Negative Output  
Integrated Switching Regulator  
SLTS025B  
(Revised 12/19/2001)  
Features  
Description  
Negative Output  
Input Voltage Range:  
+4.75 to +7 Volts  
The PT5020 series of integrated  
switching regulators (ISRs) convert a  
positive input voltage, typically +5V, to a  
negative output voltage for a wide range of  
analog and datacom applications.  
Laser-Trimmed  
Small Footprint  
Soft Start  
These Plus to Minus ISRs incorporate  
a “Buck-Boost” topology and are packaged  
in the 3-pin, single in-line pin (SIP)  
package configuration.  
5-Pin Mount Option  
(Suffixes L & M)  
Pin-Out Information Ordering Information PT Series Suffix  
(PT1234x)  
PT 5021 o = -3.3 Volts  
PT 5022 o = -5 Volts  
PT 5023 o = -9 Volts  
PT 5024 o = -12 Volts  
PT 5025 o = -15 Volts  
PT 5026 o = -5.2 Volts  
PT 5027 o = -8.0 Volts  
PT 5028 o = -6.5 Volts  
PT 5029 o = -5.5 Volts  
PT 5030 o = -6.0 Volts  
PT 5031 o = -1.7 Volts  
Pin  
1
Function  
Vin  
Case/Pin  
O rder  
Package  
Configuration  
Suffix  
Code  
*
Standard Application  
Vertical  
Horizontal  
SMD  
Horizontal, 2-pin Tab  
SMD, 2-Pin Tab  
N
A
C
M
L
(EAD)  
2
GND  
Vout  
(EAA)  
(EAC)  
+Vin  
Vout  
1
3
3
PT5020  
2
(EAM)  
(EAL)  
C2  
100µF  
C 1  
+
* Previously known as package styles 100/110.  
COM  
COM  
(Reference the applicable package code drawing  
for the dimensions and PC board layout)  
C1 = Optional ceramic (1-5µF)  
C2 = Required Electrolytic (100µF)  
NOTE: PT5020 ISRs are not Short-Circuit Protected.  
Specifications (Unless otherwise stated, Ta =25°C, Vin =5V, Io =Iomax, C2 =100µF)  
PT5020 SERIES  
Characteristics  
Symbol  
Conditions  
Min  
Typ  
Max  
Units  
(1)  
(1)  
(1)  
(1)  
Output Current  
Io  
Over Vin range  
Vo= –1.7V to –6.5V  
Vo= –9V  
0.25  
0.10  
0.10  
0.10  
1.0  
0.60  
0.50  
0.30  
A
Vo= –12V  
Vo= –15V  
(2)  
Input Voltage Range  
Vin  
Over Io range  
4.75  
7
V
Output Voltage Tolerance  
Vo  
Over Vin Range  
1.5  
3
%Vo  
(3)  
Ta = -20°C to SOA limit  
Line Regulation  
Load Regulation  
Efficiency  
Regline  
Regload  
η
Over Vin range  
0.5  
0.5  
75  
1
1
%Vo  
%Vo  
%
Iomin Io Iomax  
Io =0.5 Iomax  
5
Vo Ripple (pk-pk)  
Transient Response  
Vr  
20MHz bandwidth  
2
%Vo  
ttr  
25% load change  
500  
3.0  
µSec  
%Vo  
Vo over/undershoot  
5.0  
Current Limit  
Inrush Current  
Ilim  
150  
%Iomax  
(3)  
Iir  
tir  
On start up  
Over Io range  
1.0  
1.0  
A
mSec  
Switching Frequency  
ƒs  
V
o
=1.7 to 8V  
0.8  
1
1.2  
MHz  
kHz  
V
o
8 V  
500  
650  
800  
Operating Temperature Range  
Thermal Resistance  
Ta  
-20  
50  
+85 (4)  
°C  
θja  
Free Air Convection  
(40-60LFM)  
°C/W  
Storage Temperature  
Mechanical Shock  
Ts  
-40  
+125  
°C  
Per Mil-STD-883D, Method 2002.3  
500  
G’s  
1 msec, Half Sine, mounted to a fixture  
Mechanical Vibration  
Suffixes N, A, & C  
Suffixes L & M  
5
G’s  
Per Mil-STD-883D, 20-2000 Hz  
20  
Weight  
Suffixes N, A, & C  
Suffixes L & M  
4.5  
6.5  
grams  
(5)  
Notes: (1) The ISR will operate at no load with reduced specifications.  
(2) For applications with input voltages greater than 7 VDC, use the PT78NR100 Series.  
(3) The inrush current stated is above the normal input current for the associated output load.  
(4) See Safe Operating Area curves or consult the factory for the appropriate derating  
(5) The tab pins on the 5-pin mount package types (suffixes L & M) must be soldered. For more information see the applicable package outline drawing.  
For technical support and more information, see inside back cover or visit www.ti.com  

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