PSN1070A

更新时间： 2024-02-17 09:43:39

品牌	Logo	应用领域
ZCOMM		信号电路锁相环或频率合成电路
页数	文件大小	规格书
2页	83K
描述
LOW COST - HIGH PERFORMANCE PHASE LOCKED LOOP

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技术参数
数据手册

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PSN1070A 技术参数

是否Rohs认证：	不符合	生命周期：	Contact Manufacturer
包装说明：	,	Reach Compliance Code：	compliant
风险等级：	5.8	Is Samacsys：	N
湿度敏感等级：	1	Base Number Matches：	1

PSN1070A 数据手册

PSN1070A

9939 Via Pasar • San Diego, CA 92126

TEL (858) 621-2700 FAX (858) 621-2722

PHASE LOCKED LOOP

Rev

PHASE NOISE (1 Hz BW, typical)

FEATURES

• Frequency Range: 1055

• Step Size:

- Style Package

1105

MHz

KHz

•

PLL

APPLICATIONS

• Basestations

• Mobile Radios

Satellite Communications

•

VALUE

1055 - 1105

UNITS

MHz

PERFORMANCE SPECIFICATIONS

Frequency Range

-105

dBc/Hz

dBc

Phase Noise @ 10 kHz offset (1 Hz BW, typ.)

Harmonic Suppression (2nd, typ.)

Sideband Spurs (typ.)

-12

-70

0±3

dBc

Power Output

dBm

Load Impedance

Step Size

Ω

KHz

1000

Charge Pump Output Current

Switching Speed (typ., adjacent channel)

Startup Lock Time (typ.)

µΑ

mSec

°C

-40 to +85

Operating Temperature Range

Package Style

PLL

POWER SUPPLY REQUIREMENTS

Supply Voltage (Vcc, nom.)

Vdc

Supply Current (Icc, typ.)

All specifications are typical unless otherwise noted and subject to change without notice.

APPLICATION NOTES

• AN-107 : How to Solder Z-COMM VCOs / PLLs

• AN-200 : Mounting and Grounding of Z-COMM PLLs

• AN-201 : PLL Fundamentals

AN-202 : PLL Functional Description

NOTES:

Reference Oscillator Signal: 5 MHz<f_osc<40 MHz

Frequency Synthesizer: National Semiconductor - LMX2316

Page 1

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