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PRMH11Z PDF预览

PRMH11Z

更新时间: 2024-11-19 22:59:11
品牌 Logo 应用领域
其他 - ETC /
页数 文件大小 规格书
13页 255K
描述
PRMH11/SOT1268/DFN1412-6

PRMH11Z 数据手册

 浏览型号PRMH11Z的Datasheet PDF文件第2页浏览型号PRMH11Z的Datasheet PDF文件第3页浏览型号PRMH11Z的Datasheet PDF文件第4页浏览型号PRMH11Z的Datasheet PDF文件第5页浏览型号PRMH11Z的Datasheet PDF文件第6页浏览型号PRMH11Z的Datasheet PDF文件第7页 
PRMH11  
50 V, 100 mA NPN/NPN Resistor-Equipped double Transistors  
(RET)  
14 September 2018  
Product data sheet  
1. General description  
NPN/NPN Resistor-Equipped double Transistors (RET) in an ultra small DFN1412-6 (SOT1268)  
leadless Surface-Mounted Device (SMD) plastic package.  
PNP/PNP complement: PRMB11.  
NPN/PNP complement: PRMD3.  
2. Features and benefits  
100 mA output current capability  
Built-in bias resistors  
Simplifies circuit design  
Reduces component count  
Reduces pick and place costs  
Low package height of 0.5 mm  
AEC-Q101 qualified  
3. Applications  
Digital applications  
Cost-saving alternative to BC847/BC857 series in digital applications  
Control of IC inputs  
Switching loads  
4. Quick reference data  
Table 1. Quick reference data  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Per transistor  
VCEO  
collector-emitter  
voltage  
open base  
-
-
50  
V
IO  
output current  
DC current gain  
bias resistor 1  
bias resistor ratio  
-
-
100  
-
mA  
hFE  
R1  
VCE = 5 V; IC = 5 mA; Tamb = 25 °C  
Tamb = 25 °C  
30  
7
-
[1]  
[1]  
10  
1
13  
1.2  
kΩ  
R2/R1  
0.8  
[1] See section "Test information" for resistor calculation and test conditions.  
 
 
 
 
 

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