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PRMD10

更新时间: 2024-11-20 11:14:19
品牌 Logo 应用领域
安世 - NEXPERIA /
页数 文件大小 规格书
14页 282K
描述
50 V, 100 mA NPN/PNP Resistor-Equipped double Transistors (RET)Production

PRMD10 数据手册

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PRMD10  
50 V, 100 mA NPN/PNP Resistor-Equipped double Transistors  
(RET)  
14 September 2018  
Product data sheet  
1. General description  
NPN/PNP Resistor-Equipped double Transistors (RET) in an ultra small DFN1412-6 (SOT1268)  
leadless Surface-Mounted Device (SMD) plastic package.  
NPN/NPN complement: PRMH10.  
2. Features and benefits  
100 mA output current capability  
Built-in bias resistors  
Simplifies circuit design  
Reduces component count  
Reduces pick and place costs  
Low package height of 0.5 mm  
AEC-Q101 qualified  
3. Applications  
Digital applications  
Cost-saving alternative to BC847/BC857 series in digital applications  
Control of IC inputs  
Switching loads  
4. Quick reference data  
Table 1. Quick reference data  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Per transistor, for the PNP transistor with negative polarity  
VCEO  
collector-emitter  
voltage  
open base  
-
-
50  
V
IO  
output current  
DC current gain  
bias resistor 1  
bias resistor ratio  
-
-
100  
-
mA  
hFE  
R1  
VCE = 5 V; IC = 10 mA; Tamb = 25 °C  
Tamb = 25 °C  
100  
1.54  
17  
-
[1]  
[1]  
2.2  
21  
2.86  
26  
kΩ  
R2/R1  
[1] See section "Test information" for resistor calculation and test conditions.  
 
 
 
 
 

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