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PPC405GP-3KE266C PDF预览

PPC405GP-3KE266C

更新时间: 2024-11-26 06:04:47
品牌 Logo 应用领域
AMCC PC
页数 文件大小 规格书
59页 1340K
描述
Power PC 405GP Embedded Processor

PPC405GP-3KE266C 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:BGA包装说明:BGA, BGA456,26X26,40
针数:456Reach Compliance Code:compliant
ECCN代码:3A001.A.3HTS代码:8542.31.00.01
风险等级:5.69其他特性:ALSO REQUIRES 3.3V SUPPLY
地址总线宽度:32位大小:32
边界扫描:YES最大时钟频率:66.66 MHz
外部数据总线宽度:32格式:FIXED POINT
集成缓存:YESJESD-30 代码:S-PBGA-B456
长度:27 mm低功率模式:YES
端子数量:456最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:BGA封装等效代码:BGA456,26X26,40
封装形状:SQUARE封装形式:GRID ARRAY
峰值回流温度(摄氏度):NOT SPECIFIED电源:2.5,3.3 V
认证状态:Not Qualified座面最大高度:2.65 mm
速度:266 MHz子类别:Microprocessors
最大供电电压:2.7 V最小供电电压:2.3 V
标称供电电压:2.5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:BALL端子节距:1 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:27 mmuPs/uCs/外围集成电路类型:MICROPROCESSOR, RISC
Base Number Matches:1

PPC405GP-3KE266C 数据手册

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Part Number 405GP  
Revision 2.03 – September 7, 2007  
Data Sheet  
405GP  
Power PC 405GP Embedded Processor  
Features  
®
• PCI Revision 2.2 compliant interface (32-bit, up to  
66MHz)  
• PowerPC 405 32-bit RISC processor core  
operating up to 266MHz  
- Synchronous or asynchronous PCI Bus  
interface  
• Synchronous DRAM (SDRAM) interface operating  
up to 133MHz  
- Internal or external PCI Bus Arbiter  
- 32-bit interface for non-ECC applications  
• Ethernet 10/100Mbps (full-duplex) support with  
media independent interface (MII)  
- 40-bit interface serves 32 bits of data plus 8  
check bits for ECC applications  
• Programmable interrupt controller supports seven  
external and 19 internal edge triggered or level-  
sensitive interrupts  
• 4KB on-chip memory (OCM)  
• External peripheral bus  
- Flash ROM/Boot ROM interface  
• Programmable timers  
- Direct support for 8-, 16-, or 32-bit SRAM and  
external peripherals  
• Two serial ports (16550 compatible UART)  
• One IIC interface  
- Up to eight devices  
• General purpose I/O (GPIO) available  
• Supports JTAG for board level testing  
- External Mastering supported  
• DMA support for external peripherals, internal  
UART and memory  
• Internal processor local Bus (PLB) runs at SDRAM  
interface frequency  
- Scatter-gather chaining supported  
- Four channels  
• Supports PowerPC processor boot from PCI  
memory  
Description  
Designed specifically to address embedded  
applications, the PowerPC 405GP (PPC405GP)  
provides a high-performance, low-power solution that  
interfaces to a wide range of peripherals by  
incorporating on-chip power management features  
and lower power dissipation requirements.  
ports, IIC interface, and general purpose I/O.  
Technology: CMOS SA-12E, 0.25 μm  
(0.18 μm L )  
eff  
Package: 456-ball (35mm or 27mm), or 413-ball  
(25mm) enhanced plastic ball grid array (E-PBGA)  
This chip contains a high-performance RISC  
Power (typical): TBDW at 133MHz, 1.5W at 200MHz,  
2W at 266MHz  
processor core, SDRAM controller, PCI bus interface,  
Ethernet interface, control for external ROM and  
peripherals, DMA with scatter-gather support, serial  
AMCC  
1

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