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PPC405EP-3LB333CZ PDF预览

PPC405EP-3LB333CZ

更新时间: 2024-11-28 06:04:47
品牌 Logo 应用领域
AMCC 微控制器和处理器外围集成电路微处理器PC时钟
页数 文件大小 规格书
50页 805K
描述
PowerPC 405EP Embedded Processor

PPC405EP-3LB333CZ 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Obsolete零件包装代码:BGA
包装说明:BGA, BGA385,23X23,50针数:385
Reach Compliance Code:compliantECCN代码:3A001.A.3
HTS代码:8542.31.00.01风险等级:5.72
Is Samacsys:N其他特性:ALSO REQUIRES 3.3V SUPPLY
地址总线宽度:位大小:32
边界扫描:YES最大时钟频率:100 MHz
外部数据总线宽度:格式:FIXED POINT
集成缓存:YESJESD-30 代码:S-PBGA-B385
长度:31 mm低功率模式:YES
端子数量:385最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:BGA封装等效代码:BGA385,23X23,50
封装形状:SQUARE封装形式:GRID ARRAY
峰值回流温度(摄氏度):NOT SPECIFIED电源:1.8,3.3 V
认证状态:Not Qualified座面最大高度:2.65 mm
速度:333.33 MHz子类别:Microprocessors
最大供电电压:1.9 V最小供电电压:1.7 V
标称供电电压:1.8 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:BALL端子节距:1.27 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:31 mmuPs/uCs/外围集成电路类型:MICROPROCESSOR, RISC
Base Number Matches:1

PPC405EP-3LB333CZ 数据手册

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Part Number PPC405EP  
Revision 1.07 – September 10, 2007  
Data Sheet  
PPC405EP  
PowerPC 405EP Embedded Processor  
Features  
®
- Asynchronous PCI Bus interface  
- Internal or external PCI Bus Arbiter  
AMCC PowerPC 405 32-bit RISC processor  
core operating up to 333MHz with 16KB D-  
and I-caches  
Two Ethernet 10/100Mbps (full-duplex) ports  
with media independent interface (MII)  
PC-133 synchronous DRAM (SDRAM) inter-  
face  
Programmable interrupt controller supports  
seven external and 19 internal edge-triggered  
or level-sensitive interrupts  
- 32-bit interface for non-ECC applications  
4KB on-chip memory (OCM)  
Programmable timers  
External peripheral bus  
Software accessible event counters  
Two serial ports (16750 compatible UART)  
One IIC interface  
- Flash ROM/Boot ROM interface  
- Direct support for 8- or 16-bit SRAM and  
external peripherals  
General purpose I/O (GPIO) available  
Supports JTAG for board level testing  
- Up to five devices  
DMA support for memory and UARTs.  
- Scatter-gather chaining supported  
- Four channels  
Internal processor local bus (PLB) runs at  
SDRAM interface frequency  
Supports PowerPC processor boot from PCI  
memory  
PCI Revision 2.2 compliant interface (32-bit, up  
to 66MHz)  
Description  
Designed specifically to address embedded  
applications, the PowerPC 405EP (PPC405EP)  
provides a high-performance, low-power solution that  
interfaces to a wide range of peripherals by  
incorporating on-chip power management features  
and lower power dissipation requirements.  
Ethernet interface, control for external ROM and  
peripherals, DMA with scatter-gather support, serial  
ports, IIC interface, and general purpose I/O.  
Technology: CMOS SA-27E, 0.18 μm (0.11 μm L )  
eff  
Package: 31mm, 385-ball, enhanced plastic ball grid  
array (E-PBGA)  
This chip contains a high-performance RISC  
processor core, SDRAM controller, PCI bus interface,  
Power (typical): 0.72W at 266MHz  
AMCC  
1

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