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PPC405CR-3BC200C PDF预览

PPC405CR-3BC200C

更新时间: 2024-11-25 06:04:47
品牌 Logo 应用领域
AMCC 微控制器和处理器外围集成电路微处理器PC时钟
页数 文件大小 规格书
42页 820K
描述
PowerPC 405CR Embedded Processor

PPC405CR-3BC200C 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:BGA包装说明:27 X 27 MM, PLASTIC, EBGA-316
针数:316Reach Compliance Code:unknown
ECCN代码:3A001.A.3HTS代码:8542.31.00.01
风险等级:5.72Is Samacsys:N
其他特性:ALSO REQUIRES 3.3V SUPPLY地址总线宽度:13
位大小:32边界扫描:YES
最大时钟频率:66.66 MHz外部数据总线宽度:32
格式:FIXED POINT集成缓存:YES
JESD-30 代码:S-PBGA-B316JESD-609代码:e0
长度:27 mm低功率模式:YES
端子数量:316最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:BGA封装等效代码:BGA316,20X20,50
封装形状:SQUARE封装形式:GRID ARRAY
峰值回流温度(摄氏度):NOT SPECIFIED电源:2.5,3.3 V
认证状态:Not Qualified座面最大高度:2.65 mm
速度:200 MHz子类别:Microprocessors
最大供电电压:2.7 V最小供电电压:2.3 V
标称供电电压:2.5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:BALL
端子节距:1.27 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:27 mm
uPs/uCs/外围集成电路类型:MICROPROCESSOR, RISCBase Number Matches:1

PPC405CR-3BC200C 数据手册

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Part Number PPC405CR  
Revision 1.02 – January 11, 2005  
Data Sheet  
PPC405CR  
PowerPC 405CR Embedded Processor  
Features  
®
DMA support for external peripherals, internal  
UART and memory  
PowerPC 405 32-bit RISC processor core  
operating up to 266MHz  
- Scatter-gather chaining supported  
- Four channels  
- Memory Management Unit  
- 16KB instruction and 8KB data caches  
Programmable Interrupt Controller supports  
interrupts from a variety of sources  
- Multiply-Accumulate (MAC) function,  
including fast multiply unit  
- Supports 7 external and 10 internal interrupts  
- Edge triggered or level-sensitive  
- Positive or negative active  
- Programmable Timers  
Synchronous DRAM (SDRAM) interface oper-  
ating up to 133MHz  
- Non-critical or critical interrupt to processor  
core  
- 32-bit interface for non-ECC applications  
- 40-bit interface serves 32 bits of data plus 8  
check bits for ECC applications  
- Programmable critical interrupt priority  
ordering  
External Peripheral Bus  
Two serial ports (16550 compatible UART)  
One IIC interface  
- Flash ROM/Boot ROM interface  
- Direct support for 8-, 16-, or 32-bit SRAM and  
external peripherals  
General Purpose I/O (GPIO) available  
Supports JTAG for board level testing  
- Up to eight devices  
Internal Processor Local Bus (PLB) runs at  
SDRAM interface frequency  
- External Mastering supported  
Description  
The PowerPC 405CR (PPC405CR) is a 32-bit RISC  
embedded controller. High performance, peripheral  
integration, and low cost make the device ideal for  
wired communications, network printers, and other  
computing applications.  
The PPC405CR employs the IBM CoreConnect bus  
architecture. This architecture, as implemented on the  
PPC405CR, consists of a 64-bit, 133-MHz Processor  
Local Bus (PLB) and a 32-bit, 66-MHz On-Chip  
Peripheral Bus (OPB). High-performance peripherals  
attach to the PLB and less performance-critical periph-  
erals attach to the OPB.  
This device is an easy upgrade for systems based on  
PowerPC 403xx embedded processors, while provid-  
ing a base for custom chip designs.  
Technology: CMOS SA-12E 0.25 µm (0.18 µm L )  
eff  
The controller is powered by a PPC405 embedded  
core. This core tightly couples a 266 MHz CPU, MMU,  
instruction and data caches, and debug logic. Fine-  
tuning of the core reduces data transfer overhead,  
minimizes pipeline stalls, and improves performance.  
Package: 27mm, 316-ball enhanced plastic ball grid  
array (E-PBGA)  
Power (estimated): Typical 0.8W, Maximum 2.0W at  
200MHz.  
AMCC  
1

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