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PG320240-E

更新时间： 2024-02-21 00:12:08

品牌	Logo	应用领域
久正 - POWERTIP		/
页数	文件大小	规格书
1页	97K
描述
OUTLINE DIMENSION & BLOCK DIAGRAM

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技术参数
数据手册

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PG320240-E 技术参数

生命周期：	Contact Manufacturer	Reach Compliance Code：	compliant
风险等级：	5.57	Base Number Matches：	1

PG320240-E 数据手册

PG 320240-E

OUTLINE DIMENSION & BLOCK DIAGRAM

153.2 0.5

135.0

1.5

5.0

2.0

77.0

34.0

BL1

BL2

NO.1

320 x 240 Dots

NO.20

120.0 5.0

P1.0 x 13=13.0

2- 3.5

95.97(DOT AREA)

105.0

126.0

1.2

8.2

2-R1.75

15.0

9.5

142.0

BACK PLATE

CONTACT FACE

100.0

PIN NO.1

D-OFF

DB0~DB4

SEG.DRIVER x 4

M,CL1,CL2

0.27

320

0.03

240

COM. DRIVER

x 3

Vss

MODULATION

CIRCUIT

LCD PANEL

FLM

Vdd

POWER CIRCUIT

Vee

BL1

BL2

BACKLIGH

The tolerance unless classified 0.3mm

MECHANICAL SPECIFICATION

Overall Size

Module

W /O B/L

EL B/L

153.2 x 96.0

105.0 x 80.0

0.27 x 0.27

0.30 x 0.30

H2 / H1

View Area

Dot Size

Dot Pitch

LED / CCFL B/L

10.5 / 20.3

ABSOLUTE MAXIMUM RATING

Condition Min.

Symbol

PIN ASSIGNMENT

Item

Units

Max.

+7.0

Pin no. Symbol

Function

Vdd-Vss

Vdd-Vee

Vin

25 C

Supply for logic voltage

-0.3

25 C

+35.0

Vdd-0.3

LCD driving supply voltage

Input Voltage

FLM

Shift direction select

Synchronous signal input

Display data input clock

Column output control

Data bus line

25 C

-0.3

CL1

CL2

D-OFF

DB0

DB1

DB2

DB3

Vdd

Vss

Vee

ELECTRICAL CHARACTERISTICS

Units

Max.

Typical

Min.

4.5

Item

Symbol Condition

Power Supply Voltage

Vdd-Vss

25 C

5.5

N W

29.9

Top

N W N W

26.9

28.4

-20 C

Data bus line

25.5

23.5

28.5

Data bus line

0 C

LCD operation voltage Vop

25.9 28.5 27.4

Data bus line

24.4 25

22.5

Power supply(+)

50 C

Power supply(GND)

Negative voltage input

Contrast Adjust

23.5

70 C

LCM current consumption (No B/L)

Backlight current consumption

Idd

Vdd=5V

180

120

LED/edge VB/L=4.2V

LED/white VB/L=3.5V

Frame ground

LCD option: STN, TN, FSTN

Backlight Option: LED,EL Backlight feature, other Specs not available on catalog is under request.

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