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PM8379 PDF预览

PM8379

更新时间: 2024-11-02 03:41:47
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2页 57K
描述
20-Port 4.25 Gbit/s FC-AL Cut-Through Switch

PM8379 数据手册

 浏览型号PM8379的Datasheet PDF文件第2页 
PM8379  
CTS 20x4G  
Advance  
20-Port 4.25 Gbit/s FC-AL Cut-Through Switch  
• Built-in self test capability with FC  
Frame Generator/Comparator.  
• Supports a 106.25 MHz, 40-bit (20  
receive + 20 transmit) DDR parallel  
interface that acts as a 21st port. This  
flexible interface enables external  
functions such as enclosure  
management or other user-proprietary  
functions to be implemented using a  
low cost FPGA.  
The CTS 20x4G is designed to interface  
directly to Fibre Channel disk drives in a  
storage array. It can interface directly to  
optics or to cables at the ingress/egress  
point of an enclosure and is able to  
determine if an incoming frame is  
destined for a drive within that enclosure.  
After determining which port is  
associated with the frames recipient, a  
cut through operation to that port is  
performed thereby significantly reducing  
system latency and improving perfor-  
mance.  
CUT-THROUGH SWITCHING  
• Integrated cut-through switching and  
arbitration management enables up to  
200% improvement in EDR and IOPS.  
• Parallel arbitration supported with  
arbitration priority and access fairness  
preserved.  
• Automatic or CPU controlled  
initialization of AL_PA table.  
• Supports dynamic half duplex, half/full  
duplex operation, LPSM transfer state,  
multicast/broadcast (OPNy).  
The CTS 20x4G provides unique disk  
isolation features that significantly  
increase total system availability,  
reliability, and serviceability.  
FEATURES  
BLOCK DIAGRAM  
GENERAL  
CTS Logic  
• 20 independent rate selectable 1.0625,  
2.125 or 4.25 Gbit/s physical  
interfaces.  
• Register and software compatible to  
the PM8368 PBC 18x2G, PM8369  
PBC 18x4G, PM8372 PBC 4x2G and  
PM8377 PBC 4x4G.  
Arb  
Mgmt  
Cut Thru  
Mgmt  
AL_PA  
Table  
• Compliant to FC jitter specifications on  
a per-port basis.  
• Supports single-ended or differential  
106.25 MHz reference clock.  
• Per port monitoring and diagnostics:  
Frame Generator  
Frame Comparator  
LPSM Monitoring on each port.  
RDIN[0]  
RDIP[0]  
RX FIFO  
RX FIFO  
TX FIFO  
TX FIFO  
TDON[0]  
TDOP[0]  
Disk isolation and per port serial  
loopback.  
RDIN[1]  
RDIP[1]  
TDON[1]  
TDOP[1]  
Configurable Digital Loss of Link:  
analog LOS Detect, 8B/10B  
disparity errors/error rate, CRC  
errors/error rate, word  
RDIN[19]  
RDIP[19]  
TDON[19]  
TDOP[19]  
RX FIFO  
RX FIFO  
TX FIFO  
synchronization error/error rate, and  
compliant frequency of comma  
patterns detected (configurable  
thresholds for each with  
RXCLK  
TXD[19:0]  
TXCLK  
RXD[19:0]  
JTAG  
CDRU  
CPU  
CONTROL  
corresponding pin interrupts).  
PMC-2031144  
Issue 2  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC.,  
© Copyright PMC-Sierra, Inc. 2004.  
All rights reserved.  
AND FOR ITS CUSTOMERS’ INTERNAL USE  

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