5秒后页面跳转
捷配首页

Datasheet > PM7388
PM7388 PDF预览

PM7388

更新时间： 2024-02-19 05:10:48
品牌 Logo 应用领域
PMC /
页数 文件大小 规格书
2页 43K
描述
Frame Engine and Datalink Manager

阅读下载

中文翻译

获取价格

PM7388 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：40 X 40 MM, 1.54 MM HEIGHT, 1.27 MM PITCH, THERMALLY ENHANCED, BGA-520Reach Compliance Code：unknown
风险等级：5.92其他特性：ALSO REQUIRES 3.3V SUPPLY
地址总线宽度：32边界扫描：YES
最大时钟频率：100 MHz通信协议：SYNC, HDLC
最大数据传输速率：6.5 MBps外部数据总线宽度：32
JESD-30 代码：S-PBGA-B520JESD-609代码：e0
长度：40 mm低功率模式：YES
湿度敏感等级：3串行 I/O 数：8
端子数量：520最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：LBGA封装等效代码：BGA520,31X31,50
封装形状：SQUARE封装形式：GRID ARRAY, LOW PROFILE
峰值回流温度（摄氏度）：225电源：1.8,3.3 V
认证状态：Not Qualified座面最大高度：1.7 mm
子类别：Serial IO/Communication Controllers最大供电电压：1.94 V
最小供电电压：1.71 V标称供电电压：1.8 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：BALL端子节距：1.27 mm
端子位置：BOTTOM处于峰值回流温度下的最长时间：30
宽度：40 mmuPs/uCs/外围集成电路类型：SERIAL IO/COMMUNICATION CONTROLLER, SERIAL
Base Number Matches：1

PM7388 数据手册

 浏览型号PM7388的Datasheet PDF文件第2页 
PM7388  
FREEDM 336A1024  
Preliminary  
Frame Engine and Datalink Manager  
configurable on a per multilink bundle.  
Optionally full packet transfers are  
supported on a per bundle basis.  
• Supports up to 168 multilink bundles  
with up to 12 member links per bundle.  
These bundles are composed of  
independent HDLC channels.  
• Support for up to 100 ms of intra  
bundle skew in the receive direction  
when supporting the minimum.  
fragment size.  
• Link Control protocol packets are  
identified by the PID as control  
protocols and will be forwarded to the  
Any-PHY interface.  
FEATURES  
• Single-chip multi-channel packet  
processor supporting line rate  
throughput transfers of packet sizes  
from 40 to 9.6 Kbytes, for up to an  
aggregate of 336 T1s, 252 E1s, or 12  
DS-3s.  
• Provides simultaneous support of  
PPP, Frame Relay, Multilink-PPP and  
Multilink-Frame Relay protocols.  
Alternative protocols supported via  
HDLC termination and full packet store  
of the data within the HDLC structure.  
FRAME RELAY  
• Link layer address lookup can be  
performed based on HDLC channel  
and 10 bit DLCI for HDLC channels  
supporting Frame Relay protocols.  
• The lookup algorithm can support a  
maximum of 16 K connection  
identifiers (CIs) amongst multilink FR  
bundles. The connection identifiers  
are ignored in singlelink FR channels.  
• Control frames are identified and  
forwarded to Any-PHY interface.  
• 12 bit sequence numbers supported.  
• FECN, BECN, and DE ingress  
processing as per FRF.12.  
• Support for PPP header compression  
as per RFC 1661.  
PPP  
MULTILINK PPP AND FRAME  
RELAY BUNDLES  
• Capable of supporting fragment sizes  
from 1 to 9.6 Kbytes.  
• Support for 3 egress fragmentation  
sizes (128, 256, and 512 bytes)  
• Support for 16 COS levels in  
accordance with RFC 2686.  
• Either 12 bit or 24 bit sequence  
number, with short and long fragment  
header formats, is supported.  
BLOCK DIAGRAM  
TXCLK  
TXADDR[15:0]  
TPA  
TXDATA[15:0]  
TXPRTY  
TRDY  
TSX  
TEOP  
TMOD  
TERR  
DDLL-  
140  
JTAG  
Microprocessor I/F (BUMP2)  
Tx ANY-PHY  
I/F (TAPI-12)  
ACIFP  
CIFPOUT  
Egress  
Queue  
Manager  
(EQM-12)  
Tx  
Tx HDLC  
Fragment  
Builder  
ADATA[7:0]  
Transmit  
Processor /  
Partial Packet  
Buffer  
Insert  
SBI  
(INSBI-  
336)  
ADP  
APL  
Channel  
Assigner  
(TCAS-12)  
(TFRAG)  
CCDAT[35:0]  
CCADD[17:0]  
CCWEB  
SRAM  
Controller  
(SRAMC)  
(THDL-12)  
AV5  
AJUST_REQ  
CCSELB  
CCBSELB[1:0]  
Performance  
Monitor  
(PM-12)  
CBDAT[47:0]  
CBADD[12:0]  
CBWEB  
CB DRAM  
Controller  
CBCSB  
REFCLK  
CBRASB  
(CB_DRAMC)  
CBCASB  
CBBS[1:0]  
Rx HDLC  
Processor /  
Partial Packet  
Buffer  
DDATA[7:0]  
DDP  
RXCLK  
RXADDR[3:0]  
RPA  
Ingress  
Queue  
Manager  
(EQM-12)  
Rx  
Receive  
Channel  
Assigner  
(RCAS-12)  
Frame  
Builder  
(FRMBLD)  
Fragment  
Builder  
(RFRAG)  
(RHDL-12)  
Extract  
SBI  
(EXSBI-  
336)  
DPL  
RENB  
RXDATA[15:0]  
RXPRTY  
RVAL  
DV5  
Rx ANY-PHY  
I/F  
(RAPI-12)  
DC1FP  
RS DRAM  
Controller  
RSX  
RSOP  
(RS_DRAMC)  
REOP  
RMOD  
RERR  
Data  
Control  
PMC-1991475 (p2)  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE  
Copyright PMC-Sierra, Inc. 2001  
12

中文翻译

下载PDF

与PM7388相关器件

型号 品牌 获取价格 描述 数据表
PM7388? ETC

获取价格

 		PMC-1991476 FRAME ENGINE AND DATALINK MANAGER 336A1024 Data Sheet [2.22 MB]
PM7389 PMC

获取价格

 		Frame Engine and Datalink Manager
PM7389? ETC

获取价格

 		PMC-2000689 FREEDM-84A1024 Data Sheet [1.12 MB]
PM7390? ETC

获取价格

 		Data Sheet Errata|PMC-2012646 [173 kB]?
PM7390-BI ETC

获取价格

 		Telecommunication IC
PM73SH-100M-RC BOURNS

获取价格

 		General Purpose Inductor, 10uH, 20%, 1 Element, Ferrite-Core, SMD, ROHS COMPLIANT
PM73SH-102M BOURNS

获取价格

 		General Purpose Inductor, 1000uH, 20%, 1 Element, Ferrite-Core, SMD, 2929
PM73SH-102M-RC BOURNS

获取价格

 		General Purpose Inductor, 1000uH, 20%, 1 Element, Ferrite-Core, SMD, ROHS COMPLIANT
PM73SH-120M BOURNS

获取价格

 		General Purpose Inductor, 12uH, 20%, 1 Element, Ferrite-Core, SMD, 2929
PM73SH-120M-RC BOURNS

获取价格

 		General Purpose Inductor, 12uH, 20%, 1 Element, Ferrite-Core, SMD, ROHS COMPLIANT

与PM7388相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证