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PM7384

更新时间： 2024-02-28 10:07:16

品牌	Logo	应用领域
PMC		/
页数	文件大小	规格书
2页	33K
描述
Frame Engine and Data Link Manager

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技术参数
数据手册

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PM7384 技术参数

是否Rohs认证：	符合	生命周期：	Transferred
包装说明：	35 X 35 MM, 1.51 MM HEIGHT, SBGA-352	Reach Compliance Code：	compliant
风险等级：	5.77	其他特性：	ALSO OPERATES AT 3.3V SUPPLY
地址总线宽度：	32	边界扫描：	YES
总线兼容性：	PCI	最大时钟频率：	66 MHz
通信协议：	SYNC, HDLC	最大数据传输速率：	19.5 MBps
外部数据总线宽度：	32	JESD-30 代码：	S-PBGA-B352
JESD-609代码：	e1	长度：	35 mm
低功率模式：	NO	湿度敏感等级：	3
串行 I/O 数：	3	端子数量：	352
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	LBGA
封装形状：	SQUARE	封装形式：	GRID ARRAY, LOW PROFILE
峰值回流温度（摄氏度）：	260	认证状态：	Not Qualified
座面最大高度：	1.7 mm	最大供电电压：	2.7 V
最小供电电压：	2.3 V	标称供电电压：	2.5 V
表面贴装：	YES	技术：	CMOS
温度等级：	INDUSTRIAL	端子面层：	TIN SILVER COPPER
端子形式：	BALL	端子节距：	1.27 mm
端子位置：	BOTTOM	处于峰值回流温度下的最长时间：	30
宽度：	35 mm	uPs/uCs/外围集成电路类型：	SERIAL IO/COMMUNICATION CONTROLLER, SERIAL
Base Number Matches：	1

PM7384 数据手册

PM7384

PMC-Sierra,Inc.

FREEDM-84P672

Frame Engine and Data Link Manager

• For each channel, the HDLC receiver

• Provides a standard five signal

P1149.1 JTAG test port for boundary

scan board test purposes.

• Supports 3.3 Volt I/O on non-PCI

signals. Supports 3.3 Volt PCI

signaling environment.

• 352 pin enhanced ball grid array

(SBGA) package.

FEATURES

supports programmable flag sequence

detection, bit de-stuffing and frame

check sequence validation. The

receiver supports the validation of both

CRC-CCITT and CRC-32 frame check

sequences.

• For each channel, the HDLC

transmitter supports programmable

flag sequence generation, bit stuffing

and frame check sequence generation.

The transmitter supports the

generation of both CRC-CCITT and

CRC-32 frame check sequences. The

transmitter also aborts packets under

the direction of the host or

automatically when the channel

underflows.

• Provides 32 Kbytes of on-chip memory

for partial packet buffering in both the

transmit and receive directions. This

memory may be configured to support

a variety of different channel

configurations from a single channel

with 32 Kbytes of buffering to 672

channels, each with a minimum of 48

bytes of buffering.

• Single-chip multi-channel HDLC

controller with a 66 MHz, 32 bit PCI 2.1

compatible bus for configuration,

monitoring and transfer of packet data.

• On-chip DMA controller with scatter/

gather capabilities.

• Supports up to 672 bi-directional

HDLC channels assigned to a

maximum of 84 channelised or

unchannelised links conveyed via a

19.44 MHz Scalable Bandwidth

Interconnect (SBI™) interface.

• Data on the SBI interface is divided

into three Synchronous Payload

Envelopes (SPEs). Each SPE can be

configured independently to carry data

for either 28 T1/J1 links, 21 E1 links, or

one unchannelised DS-3 link.

APPLICATIONS

• PPP interfaces for routers.

• Internet/Edge Routers.

• Frame Relay/Multiservice Switches.

• Packet-based DSLAM equipment.

• Remote Access Concentrators.

• Multiservice Access Concentrators.

• Supports three bi-directional HDLC

channels each assigned to an

unchannelised link with arbitrary rate

link of up to 51.84 MHz when SYSCLK

is running at 45 MHz. Each link may be

configured individually to replace one

of the SPEs conveyed on the SBI

interface.

BLOCK DIAGRAM

RCLK[2:0]

RD[2:0]

AD[31:0]

C/BEB[3:0]

PAR

Receive

DMA

Controller

(RMAC672)

DDATA[7:0]

Receive

Channel

Assigner

(RCAS672)

Receive

HDLC Processor

(RHDL672)

DPL

DV5

DDP

SBI

Extract

FRAMEB

TRDYB

IRDYB

STOPB

DEVSELB

Performance

Monitor

(PMON)

PCI

Controller

(GPIC672)

IDSEL

ADATA[7:0]

APL

LOCKB

REQB

Transmit

DMA

Controller

(TMAC672)

Transmit

Channel

Assigner

(TCAS672)

Transmit

HDLC Processor

(THDL672)

AV5

GNTB

SBI

Insert

ADP

PERRB

SERRB

PCIINTB

PCICLK

PCICLKO

M66EN

AJUST_REQ

AACTIVE

ADETECT[1:0]

JTAG

TD [2:0]

TCLK[2:0]

PMC-1991024 (r2)

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与PM7384相关器件

型号	品牌	描述	获取价格	数据表
PM7384?	ETC	Data Sheet Errata\|PMC-2000953 [191 kB]?	获取价格
PM7384-BGI	PMC	Serial I/O Controller, 3 Channel(s), 19.5MBps, CMOS, PBGA352, 35 X 35 MM, 1.51 MM HEIGHT,	获取价格
PM7384-BI	PMC	FRAME ENGINE AND DATA LINK MANAGER 84P672	获取价格
PM7385	PMC	84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER WITH ANY-PHY PACKET INTERFACE	获取价格
PM7385?	ETC	Data Sheet Errata\|PMC-2000954 [197 kB]?	获取价格
PM7385-BI	PMC	84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER WITH ANY-PHY PACKET INTERFACE	获取价格

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