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PM5389 PDF预览

PM5389

更新时间: 2024-01-21 14:40:01
品牌 Logo 应用领域
PMC 电信集成电路电信电路
页数 文件大小 规格书
2页 55K
描述
SONET/SDH Wideband Cross-Connect

PM5389 技术参数

生命周期:Active包装说明:,
Reach Compliance Code:compliant风险等级:5.21
Base Number Matches:1

PM5389 数据手册

 浏览型号PM5389的Datasheet PDF文件第2页 
PM5389  
WSE 20  
Released  
SONET/SDH Wideband Cross-Connect  
container of VT/TUs. The contents  
may be switched intact or switched as  
VT/TUs.  
• Provides fully automatic protection  
FEATURES  
switching for Class 1 protection  
services including 1+1 protection,  
UPSR, SNCP, and static mesh  
protection services.  
• Provides hardware assists for Class 2  
protection services including 1:N  
protection, BLSR-2/4, MSSPRING-2/4,  
and dynamic mesh protection  
schemes.  
GENERAL  
• Multi-purpose SONET/SDH VT/TU and  
SONET/SDH STS/STM cross-connect.  
• With a memory-switch architecture,  
implements a strictly non-blocking  
switch that supports a VT/TU level  
fabric of up to 25 Gbit/s.  
• Supports 10 high-speed Enhanced  
SONET Serial Interface (ESSI) CML  
links each independently configurable  
for STS-48/STM-16 at 2.488 Gbit/s or  
STS-12/STM-4 at 622.08 Mbit/s  
operation.  
• Allows each SONET VT Group to be  
independently configured to carry  
VT1.5, VT2, VT3, or VT6 tributaries.  
• Allows each SDH TUG2 to be  
independently configured to carry  
TU11, TU12, or TU2 tributaries.  
• Provides a device latency of  
5.62 (+/-0.17) µs for 2.488 Gbit/s and  
6.21 (+/-0.67) µs for 622 Mbit/s links.  
I/O AND GENERAL  
• All high-speed ingress and egress links  
are 1.2 V CML and are ELVDS-  
compatible with programmable  
pre-emphasis on transmit, equalization  
on receive, and support for both AC  
and DC coupled interfaces.  
• Each high-speed link supports  
SONET/SDH framed or unframed  
PRBS-23 or PRBS-7 generation and  
monitoring for off-line link verification.  
• Configured, controlled, and monitored  
using a generic 32-bit microprocessor  
interface.  
SONET/SDH OVERHEAD  
ACCESSIBILITY  
• Supports extraction of the transport  
overhead (TOH) from the ingress ports  
(both high and low-speed) as well as  
the insertion of transport overhead into  
the egress ports via low bandwidth  
two-bit 77.76 MHz interfaces.  
• Supports system frame  
synchronization using an external  
frame pulse or ESSI smart frame  
synchronization using the frame  
boundary of the receive links.  
• Compensates for differences in frame  
boundary arrival times between  
ingress ports using FIFOs and device  
level software configurable delay  
registers.  
APS FEATURES  
• Supports a hardware-based Automatic  
Protection Switching mechanism  
(MAPS) for centralized link protection  
control when operating with other  
PMC-Sierra devices such as the  
PM5369 TUPP 9953.  
• Provides a standard 5-signal IEEE  
1149.1 JTAG test port for boundary  
scan test purposes.  
• Each SONET STS-1 or SDH  
VC3/VC4-TUG3 may be independently  
configured as a single unit and/or as a  
BLOCK DIAGRAM  
TOH Insertion I/F  
TOH Extraction I/F  
2 x 77.76 MHz  
2 x 77.76 MHz  
25G STS/STM/  
VT/TU  
MAPS  
CML Interface  
10 x 2488 MHz or  
10 x 622 MHz  
Memory  
CML Interface  
10 x 2488 MHz or  
10 x 622 MHz  
Overhead  
Insertion  
Logic  
Overhead  
Extraction  
Logic  
Transmit  
Interface  
Receive  
Interface  
Protection  
Switching  
Processor  
Switch Core  
Connection Map  
PMC-2031810 (R4)  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE  
© Copyright PMC-Sierra, Inc. 2004  

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