Datasheet > PM5315-BI

PM5315-BI

更新时间： 2024-11-05 20:07:23

品牌	Logo	应用领域
PMC		ATM 异步传输模式电信电信集成电路
页数	文件大小	规格书
2页	107K
描述
Support Circuit, 1-Func, CMOS, PBGA520, 40 X 40 MM, 1.54 MM HEIGHT, SBGA-520

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中文翻译

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技术参数
数据手册

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PM5315-BI 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
包装说明：	40 X 40 MM, 1.54 MM HEIGHT, SBGA-520	Reach Compliance Code：	compliant
风险等级：	5.9	JESD-30 代码：	S-PBGA-B520
JESD-609代码：	e0	长度：	40 mm
湿度敏感等级：	3	功能数量：	1
端子数量：	520	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	LBGA	封装形状：	SQUARE
封装形式：	GRID ARRAY, LOW PROFILE	峰值回流温度（摄氏度）：	225
认证状态：	Not Qualified	座面最大高度：	1.7 mm
标称供电电压：	1.8 V	表面贴装：	YES
技术：	CMOS	电信集成电路类型：	ATM/SONET/SDH SUPPORT CIRCUIT
温度等级：	INDUSTRIAL	端子面层：	TIN LEAD
端子形式：	BALL	端子节距：	1.27 mm
端子位置：	BOTTOM	处于峰值回流温度下的最长时间：	30
宽度：	40 mm	Base Number Matches：	1

PM5315-BI 数据手册

PM5315

PMC-Sierra,Inc.

Preliminary

SPECTRA-2488

SONET/SDH Payload Extractor/Aligner for 2488 Mbit/s

• Provides termination for SONET

Section, Line and Path overhead or

SDH Regenerator Section, Multiplexer

Section and High Order Path

• Interprets or generates the STS (AU)

FEATURES

pointer bytes (H1, H2, H3), extracts or

inserts the synchronous payload

envelope(s) and processes or inserts

the path overhead.

• Monolithic SONET/SDH Payload

Extractor/Aligner for use in interface

applications, operating at serial

overhead.

interface speeds of up to 2488 Mbit/s:

• In single STS-48/STM-16 mode

provides a 32-bit 77.76 MHz ADD and

DROP TelecomBus.

• In quad STS-12/STM-4 mode provides

four 8-bit 77.76 MHz ADD and DROP

TelecomBus Interfaces.

• Maps SONET/SDH payloads to

system timing, accommodating

plesiochronous timing offsets between

the line and system timing references,

through pointer processing.

• The entire SONET/SDH transport and

path overheads are extracted to and

inserted from dedicated pins.

• Provides Time Slot Interchange (TSI)

function at the ADD and DROP

TelecomBus Interfaces for grooming

any legal mix of SONET/SDH paths.

• Supports Automatic Protection

Switching (APS):

•

single STS-48c (STM-16/AU4-16c);

•

single STS-48 (STM-16/AU4-

4c/AU4/AU3/TU3);

•

quad STS-12c (STM-4/AU4-4c);

quad STS-12 (STM-

4/AU4/AU3/TU3).

•

Ring control port communication of

path REI and path RDI alarms;

• In single STS-48/STM-16 mode,

supports a duplex 16-bit 155.52 MHz

differential PECL line side interface for

direct connection to external clock

recovery, clock synthesis and

•

Filters the APS channel (K1,K2)

bytes into internal registers; inserts

the APS channel into the transmit

stream.

serializer-deserializer components.

• In quad STS-12/STM-4 mode,

supports four duplex 8-bit 77.76 MHz

TTL compatible line side interfaces for

direct connection to external clock

recovery, clock synthesis and

• Supports line loopback from the line

side receive stream to the transmit

stream and diagnostic loopback from

an ADD TelecomBus interface to a

DROP TelecomBus interface.

• Provides a standard five signal IEEE

1149.1 JTAG test port for boundary

scan board test purposes.

• Frames to the SONET/SDH receive

stream and inserts framing bytes and

STS identification into the transmit

stream and processes or inserts the

transport overhead.

serializer-deserializer components.

Receive O/H Clock,

BLOCK DIAGRAM

Frame Pulse

Receive Transport

Overhead

Receive Path

Overhead

Bit-interleaved

Parity Error

Status

Receive Section/Line

DCC and Clock

Information

Rx Ring

Control

Port

Rx APS

Sync

Section

Extractor

Trace

(STS-12) Receive Path Processing Slice

Path

Processor

Trace

Bit Error

Monitor

Processor

OC-48 Mode:

16-bit x 155.52

Mbit/s PECL

OC-48 Mode:

32-bit x 77.76 Mbit/s

Drop Bus

TelecomBus

Rx Line

Rx Timeslot TelecomBus

PRBS

Rx Path O/H

Processor

Telecom

Generator/

Aligner

RX Transport

Interface

Interchange

System

4 x OC-12 Mode:

4 x 8-bit x 77.76

Mbit/s TTL

4 x OC-12 Mode:

4 x 8-bit x 77.76

Mbit/s TelecomBus

O/H Processor

Interface

Monitor

SONET/SDH

Alarm

Reporting

Controller

(STS-12) Transmit Path Processing Slice

Path

Trace

Section

Trace

Processor

OC-48 Mode:

16-bit x 155.52

Mbit/s PECL

OC-48 Mode:

32-bit x 77.76 Mbit/s

TelecomBus

Add Bus Tx Pointer

Tx Line

TelecomBus Tx Timeslot

PRBS

Interpreter

Tx Path O/H

Processor

Telecom

Aligner

Tx Transport

Interface

System

Interchange

Generator/ (STS/AU-

4 x OC-12 Mode:

4 x 8-bit x 77.76

Mbit/s TTL

4 x OC-12 Mode:

4 x 8-bit x 77.76

Mbit/s TelecomBus

O/H Processor

Interface

Monitor

TU3)

Tx Ring

JTAG Test

Mode

Microprocessor Interface

Control Port

Access Port

Transmit O/H

Transmit Path

O/H

16-bit

Microprocessor

Bus

Control

Transmit

Transport

O/H

Quad 622

or 2488

Test Data

Clock, Frame

Pulse

and

Status

Transmit

Information

Section/Line

DCC Clock

PMC-2000326 (p1)

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

中文翻译

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与PM5315-BI相关器件

型号	品牌	获取价格	描述	数据表
PM5316	PMC	获取价格	Quad Channel 155 Mbit/s SONET/SDH Framer and Aligner
PM5316?	ETC	获取价格	PMC-1990822 SPECTRA-4x155 Telecom Standard Product Data Sheet [1.77 MB]
PM5316-BGI	MICROSEMI	获取价格	Support Circuit, 1-Func, CMOS, PBGA520, 40 X 40 MM, 1.54 MM HEIGHT, 1.27 MM PITCH, SBGA-52
PM5316-BI	PMC	获取价格	SONET/SDH Payload Extractor/Aligner(4 x 155 Mbit/s)
PM5316-BI	MICROSEMI	获取价格	Support Circuit, 1-Func, CMOS, PBGA520, 40 X 40 MM, 1.54 MM HEIGHT, 1.27 MM PITCH, SBGA-52
PM5317	PMC	获取价格	SONET/SDH Payload Extractor/Aligner for 9953 Mbit/s
PM5317?	ETC	获取价格	PMC-2000741 SPECTRA-9953 Telecom Standard Product Data Sheet [2.47 MB]
PM5317-FI	ETC	获取价格	Telecomm/Datacomm
PM5319	PMC	获取价格	SONET/SDH Interface for 622 & 155 Mbit/s
PM5320-NI	PMC	获取价格	Support Circuit, 1-Func, PBGA196, 15 X 15 MM, 1.40 MM HEIGHT, MO-192AAE-1, CABGA-196

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