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PM5310-BI PDF预览

PM5310-BI

更新时间: 2024-09-15 13:02:19
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PM5310-BI 数据手册

 浏览型号PM5310-BI的Datasheet PDF文件第2页 
PM5310  
TBS  
PMC-Sierra,Inc.  
Preliminary  
TelecomBus Serializer for 2.5 Gbit/s Interconnect  
redundant receive LVDS serial  
TelecomBus streams for protection  
switching purposes.  
• Provides independent time-slot  
interchange blocks on the Incoming  
and Outgoing parallel TelecomBus  
streams to allow arbitrary arrangement  
of time-slots at STS-1 granularity.  
• Supports redundant working/protection  
time-space-time switch fabric.  
• Supports through-traffic, drop-traffic  
and protection switching in UPSR, 2-  
fibre BLSR and 4-fibre BLSR  
applications (when used with the  
PM5372 TSE).  
• Uses extended 8B/10B-based line  
coding protocol on the serial links to  
provide transition density guarantee  
and DC balance and to offer a greater  
control character vocabulary than the  
standard 8B/10B protocol.  
• Provides encoding of TelecomBus  
control signals at the multiplex section  
termination (MST) point, high-order  
path termination (HPT) point and low-  
order path termination (LPT) point.  
• Provides optional PRBS generation for  
each outgoing LVDS serial  
TelecomBus data link for off-line link  
verification.  
• Provides PRBS detection for each 8-bit  
bus on the Incoming parallel  
TelecomBus stream.  
FEATURES  
• Encodes data from the Incoming  
parallel TelecomBus to a set of four  
working, a set of four protection, and a  
set of four auxiliary 777.6 Mbit/s LVDS  
serial TelecomBus links with extended  
8B/10B-based encoding.  
• Decodes data from a set of four  
working, a set of four protection, or a  
set of four auxiliary 777.6 MHz LVDS  
serial links with extended 8B/10B-  
based encoding to the Outgoing  
TelecomBus stream.  
• Provides capacity to carry an STS-  
12/STM-4 stream in each LVDS serial  
TelecomBus link. Four links can be  
aggregated to form an STS-48c/STM-  
16c stream.  
• Provides capacity to carry an STS-  
12/STM-4 stream in each 8-bit bus of  
the parallel TelecomBus stream. Four  
8-bit buses can be aggregated to carry  
an STS-48c/STM-16c stream.  
• Provides PRBS detection for each  
incoming LVDS serial TelecomBus  
stream for off-line link verification.  
• Provides optional PRBS generator for  
each 8-bit bus on the outgoing parallel  
TelecomBus stream.  
• Provides in-service link verification by  
optionally overwriting the B1 and E1  
byte of each constituent STS-1/STM-0  
with a unique software programmable  
byte and its complement.  
• Provides pins to coordinate updating of  
the connection map of the time-slot  
interchange blocks in the local device,  
peer PM5310 TBS devices and  
companion PM5372 TSE devices.  
• Derives all internal timing from a single  
77.76 MHz system clock.  
• Provides redundant working,  
protection and auxiliary transmit LVDS  
serial TelecomBus streams and  
BLOCK DIAGRAM  
Transmit Working  
Transmit Working  
Serializer  
Transmit Working  
LVDS Interface  
(TWLV #1 - #4)  
Transmit Working  
Disparity Encoder  
ID[4:1][7:0]  
Time-Slot  
Interchange  
(TWTI)  
Incoming Data  
8B/10B Encoder  
(ID8E #1 #4)  
IDP[4:1]  
IPL[4:1]  
(TWPS #1  
-
#4)  
(TWDE #1  
- #4)  
TPWRK[4:1]  
TNWRK[4:1]  
-
Transmit Protect  
Time-Slot  
Interchange  
(TPTI)  
Transmit Auxiliary  
Time-Slot  
Interchange  
(TATI)  
Transmit Protect  
Serializer  
Transmit Protect  
LVDS Interface  
(TPLV #1 - #4)  
Transmit Protect  
Disparity Encoder  
IJ0J1[4:1]  
IPAIS[4:1]  
ITV5[4:1]  
TPPROT[4:1]  
TNPROT[4:1]  
(TPPS #1  
-
#4)  
(TPDE #1  
- #4)  
Incoming  
TelecomBus  
PRBS  
Incoming  
TPAUX[4:1]  
TNAUX[4:1]  
PRBS  
8B/10B  
Encoder  
ITPL[4:1]  
Transmit Auxiliary  
Disparity Encoder  
Transmit Auxiliary  
Serializer  
Transmit Auxiliary  
LVDS Interface  
(TALV #1 - #4)  
ITAIS[4:1]  
Processor  
(TADE #1  
-
#4)  
(TAPS #1  
-
#4)  
(ITPP #1  
-
#4)  
(IP8E #1 - #4)  
Tx Ref  
Clock  
Synthesis  
Unit  
SYSCLK  
Receive  
Receive  
Working PRBS  
Monitor  
Receive  
Working  
8B/10B Decoder  
Receive  
Working  
LVDS Interface  
(RWLV #1 #4)  
Working Data  
Recovery Unit  
OD[4:1][7:0]  
ODP[4:1]  
Working Time-  
Slot Interchg  
(RWTI)  
Receive Protect  
Time-Slot  
Interchg  
(RPTI)  
Receive  
(WDRU #1  
-
#4)  
RPWRK[4:1]  
RNWRK[4:1]  
RPPROT[4:1]  
RNPROT[4:1]  
RPAUX[4:1]  
RNAUX[4:1]  
(RWPM #1  
-
#4)  
(RW8D #1  
-
#4)  
-
OPL[4:1]  
Outgoing  
TelecomBus  
PRBS  
Receive Protect  
PRBS Monitor  
Receive Protect  
8B/10B Decoder  
Protect Data  
Recovery Unit  
Receive Protect  
LVDS Interface  
OJ0J1[4:1]  
OPAIS[4:1]  
OTV5[4:1]  
OTPL[4:1]  
(RPPM #1  
-
#4)  
(RP8D #1  
-
#4)  
(PDRU #1  
-
#4)  
(RPLV #1  
- #4)  
Generator  
(OTPG #1  
- #4)  
Receive  
Auxiliary  
Receive  
Auxiliary  
8B/10B Decoder  
Receive  
Auxiliary  
LVDS Interface  
(RALV #1 - #4)  
Auxiliary Data  
Recovery Unit  
Auxiliary Time-  
Slot Interchg  
(RATI)  
OTAIS[4:1]  
PRBS Monitor  
(RAPM #1 #4)  
(ADRU #1  
- #4)  
-
(RA8D #1  
-
#4)  
Microprocessor  
Interface  
JTAG  
PMC-2000329 (P1)  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERSINTERNAL USE  
© Copyright PMC-Sierra, Inc. 2000  

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