Datasheet > PM4325

PM4325

更新时间： 2024-09-22 21:54:23

品牌	Logo	应用领域
PMC		/
页数	文件大小	规格书
2页	48K
描述
Octal Short Haul T1/E1/J1 Low Latency Transport Line Interface

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

PM4325 数据手册

PM4325

OCTLIU ST

Octal Short Haul T1/E1/J1 Low Latency Transport Line Interface

• Provides a selectable, per channel

independent de-jittered T1 or E1

recovered clock for system timing and

redundancy.

• Provides PRBS generators and

detectors on each tributary for error

testing at DS1 and E1 rates as

recommended in ITU-T O.151.

• Uses line rate system clock.

• Recovers clock and data using a digital

phase locked loop for high jitter

tolerance.

• Tolerates more than 0.4 UI peak-to-

peak high frequency jitter as required

by AT&T TR 62411 and Bellcore

TR-TSY-000170.

• Outputs dual rail recovered line pulses,

a single rail DS-1/E1 signal, or parallel

data in SBI/SBI TR bus format.

• Performs B8ZS or AMI decoding when

processing a bipolar DS-1 signal and

HDB3 or AMI decoding when

processing a bipolar E1 signal.

• Detects line code violations (LCVs),

B8ZS/HDB3 line code signatures, and

four (E1), eight (T1+B8ZS), or sixteen

(T1 AMI) successive zeros.

FEATURES

• Monolithic device integrating eight

T1/J1 or E1 short haul line interface

units.

• Software switchable between T1/J1

and E1 operation on a per-device

basis.

• Meets or exceeds T1/J1 and E1 short

haul network access specifications

including ANSI T1.102, T1.403,

T1.408, AT&T TR 62411, ITU-T G.703,

G.704 as well as ETSI 300-011, TBR

4, TBR 12, and TBR 13. In conjunction

with the TEMAP 84 (PM5366), allows

Add Drop Multiplexers and Terminal

Multiplexers to meet GR253, GR496,

and G.783.

• Optional encoding/decoding of B8ZS,

HDB3, and AMI line codes.

• Provides receive equalization, clock

recovery, and line performance

monitoring.

SYSTEM INTERFACE

• Supports transfer of transmitted single

rail PCM and signaling data from

1.544 Mbit/s and 2.048 Mbit/s

backplane buses or a SBI/SBI TR

interface for low pin count

interconnection of up to 11 OCTLIU

STs to the high-density PM5366

TEMAP 84 T1/E1 framer.

• Provides a programmable depth FIFO

buffer for jitter attenuation, rate

conversion, and latency optimization in

the receive path.

RECEIVE SECTION

• Supports T1/E1 signal reception for

distances with up to 12dB of cable

attenuation at nominal conditions using

PIC 22 gauge cable emulation.

• Supports G.772 compliant

non-intrusive protected monitoring

points.

TRANSMIT SECTION

• Provides transmit and receive jitter

attenuation.

• Provides digitally programmable pulse

templates.

• Generates DSX-1 short haul pulses

with programmable pulse shape

compatible with AT&T, ANSI, and ITU

requirements.

BLOCK DIAGRAM

TDN[8:1]

TDP[8:1]

TCLK[8:1]

DSYNC

DDATA[7:0]

SBI TR

Extract

DLINKRATE[5:0]

DPARITY

DALARM

TXTIP1[8:1]

LCODE

XIBC

TJAT

XPDE

TXTIP2[8:1]

XLPG

AMI / B8ZS /

HDB3 Line

Encoder

Inband Loop-

back Code

Generator

DVALID

DFULL

Digital Jitter

Attenuator

Pulse Density

Enforcer

Transmit LIU

TXRING1[8:1]

TXRING2[8:1]

PISO

DC1FP

DDATA[7:0]

DDP

SBI

(Diagnostic

Extract

Digital

DPL

DV5

Loopback)

PRBS

Pattern

PMON

Performance

Monitor

REFCLK

Generator /

Detector

C1FPOUT

ADATA[7:0]

ADP

(Line

Loopback)

SBI

Insert

APL

AV5

IBCD

RXTIP[8:1]

RJAT

CDRC

PDVD

AACTIVE

RLPS

Inband Loop

back Code

Detector

Digital Jitter

Attenuator

Clk/Data

Pulse Density

Viol. Detector

AC1FP

Receive LIU

SIPO

Recovery

RXRING[8:1]

ADATA[7:0]

ALINKRATE[5:0]

SBI TR

Insert

APARITY

AALARM

AVALID

ASYNC

LIU Octant x 8

CSD

RDP[8:1]

TOPS

XCLK

Clock

RDN/RLCV[8:1]

RCLK[8:1]

Timing

Synthesis /

Distribution

RSYNC

Options

LOS

TXHIZ/LineLB

Serial

H/W only

uP Interface

JTAG

Output

Auto-config

SBI_EN

RSTB

PMC-2030527 (R2)

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

中文翻译

下载PDF

与PM4325相关器件

型号	品牌	获取价格	描述	数据表
PM432-670.00M	CONNOR-WINFIELD	获取价格	LVPECL Output Clock Oscillator, 670MHz Nom, ROHS COMPLIANT, HERMETIC SEALED, CERAMIC PACKA
PM432-673.0M	CONNOR-WINFIELD	获取价格	Oscillator
PM43-270K-RC	BOURNS	获取价格	SMD Power Inductor
PM43-270M	ETC	获取价格	SMT Power Inductors
PM43-270M-RC	BOURNS	获取价格	General Purpose Inductor, 27uH, 20%, 1 Element, Ferrite-Core, SMD, 1816, ROHS COMPLIANT
PM4328	PMC	获取价格	HIGH DENSITY T1/E1 FRAMER WITH INTEGRATED M13 MULTIPLEXER
PM4328?	ETC	获取价格	Data Sheet Errata\|PMC-2011799 [191 kB]?
PM4328-PI	PMC	获取价格	HIGH DENSITY T1/E1 FRAMER WITH INTEGRATED M13 MULTIPLEXER
PM4329	MICROSEMI	获取价格	Telecom IC, CMOS, PBGA276,
PM4329	PMC	获取价格	Telecom IC, CMOS, PBGA276,

与PM4325相关文章

SK海力士量产12层HBM3E，容量高达36GB
2024-09-27

4
意法半导体传感器驱动Sphere，开启沉浸式电影新时代
2024-09-27

6
摩尔斯微电子在美国约书亚树国家公园测试 Wi-Fi HaLow
2024-09-18

79
贸泽上架Tallysman TW5386智能GNSS天线
2024-09-18

69

产品中心

服务支持

精选活动

关于我们

帮助中心

PM4325

PM4325 数据手册

与PM4325相关器件

与PM4325相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

PM4325

PM4325 数据手册

与PM4325相关器件

与PM4325相关文章

您还可以找

您在本页遇到什么问题？