Datasheet > PLX9060

PLX9060

更新时间： 2024-09-23 23:28:47

品牌	Logo	应用领域
其他 - ETC		PC
页数	文件大小	规格书
100页	2230K
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PCI Interface Chip\|PCI9060 Data Sheet

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PLX9060 数据手册

PCI 9060

December, 1995

VERSION 1.2

PCI Bus Master Interface Chip for

Adapters and Embedded Systems

________________________________________________________________________________

Features

General Description _______________

• PCI Bus Master Interface supporting adapters and

The PCI9060 provides a compact high performance PCI

bus master interface for adapter boards and embedded

systems. The chip’s local bus follows the protocol of the

Intel i960 microprocessor family.

embedded systems

• Two independent DMA channels for local bus

memory to/from PCI host bus data transfers

• Four bi-directional FIFOs for zero wait-state burst

operation; one for each DMA channel, one for Direct

Master interface and one for slave interface

The PCI9060 provides two independent bi-directional

DMA channels with bi-directional FIFOs supporting zero

wait-state burst transfers between host and local

memory. Each channel also supports full data chaining

modes which allows concurrent operations. The chip

also contains a bi-directional FIFO for efficient slave

access. In addition, another bi-directional FIFO ensures

high speed Direct Bus Master transfers.

• PCI Bus Master transfers up to 132 MBytes/sec

• Supports both multiplexed and non-multiplexed local

buses, 32, 16 or 8 bit. May connect directly to Intel

i960 Cx, Hx, Jx, Kx and Sx processors

• Local bus can run asynchronously to the PCI clock.

• Eight 32 bit mailbox and two 32 bit doorbell registers

• Low power CMOS in 208 Pin Plastic QFP Package

The PCI9060 also allows the local processor and other

intelligent controllers to perform direct bus master

transfers on the PCI bus. As an option, the PCI9060 can

enable the local processor to configure other PCI devices

in the system.

________________________________________________________________________________

Figure 1. Typical Adapter or Embedded System Block Diagram

________________________________________________________________________________

PLX Technology, Inc., 1995

PLX Technology, Inc., 625 Clyde Avenue, Mountain View, CA 94043 (415) 960-0448 FAX (415) 960-0479

Products and Company names are trademarks/registered trademarks of their respective holders

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