Datasheet > PLL1707DBQR

PLL1707DBQR

更新时间： 2024-11-09 22:22:39

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页数	文件大小	规格书
22页	171K
描述
3.3 V DUAL PLL MULTICLOCK GENERATOR

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中文翻译

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数据手册

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PLL1707DBQR 数据手册

ꢀ ꢁꢁꢂ ꢃꢄ ꢃ

ꢀ ꢁꢁꢂ ꢃꢄ ꢅ

SLES065 – DECEMBER 2002

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FEATURES

APPLICATIONS

27-MHz Master Clock Input

HDD + DVD Recorders

DVD Recorders

HDD Recorders

DVD Players

Generated Audio System Clock (PLL1707):

– SCKO0: 768 f (f = 44.1 kHz)

– SCKO1: 768 f , 512 f (f = 48 kHz)

– SCKO2: 256 f (f = 32, 44.1, 48, 64, 88.2,

96 kHz)

– SCKO3: 384 f (f = 32, 44.1, 48, 64, 88.2,

DVD Add-On Cards for Multimedia PCs

Digital HDTV Systems

96 kHz)

Generated Audio System Clock (PLL1708):

– SCKO0: 768 f (f = 44.1 kHz)

Set-Top Boxes

– SCKO1: 768 f , 512 f , 384 f , 256 f

(f = 48 kHz)

– SCKO2: 256 f (f = 16, 22.05, 24, 32, 44.1,

DESCRIPTION

48, 64, 88.2, 96 kHz)

– SCKO3: 384 f (f = 16, 22.05, 24, 32, 44.1,

†

The PLL1707 and PLL1708 are low cost, phase-locked

loop (PLL) multiclock generators. The PLL1707 and

PLL1708 can generate four system clocks from a 27-MHz

reference input frequency. The clock outputs of the

PLL1707 can be controlled by sampling frequency-control

pins and those of the PLL1708 can be controlled through

serial-mode control pins. The device gives customers both

cost and space savings by eliminating external

components and enables customers to achieve the very

low-jitter performance needed for high performance audio

DACs and/or ADCs. The PLL1707 and PLL1708 are ideal

for MPEG-2 applications which use a 27-MHz master

clock such as DVD recorders, HDD recorders, DVD

add-on cards for multimedia PCs, digital HDTV systems,

and set-top boxes.

48, 64, 88.2, 96 kHz)

Zero PPM Error Output Clocks

Low Clock Jitter: 50 ps (Typical)

Multiple Sampling Frequencies (PLL1707):

– f = 32, 44.1, 48, 64, 88.2, 96 kHz

Multiple Sampling Frequencies (PLL1708):

– f = 16, 22.05, 24, 32, 44.1, 48, 64, 88.2,

96 kHz

3.3-V Single Power Supply

PLL1707: Parallel Control

PLL1708: Serial Control

Package: 20-Pin SSOP (150 mil), Lead-Free

Product

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate

precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to

damage because very small parametric changes could cause the device not to meet its published specifications.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments

semiconductor products and disclaimers thereto appears at the end of this data sheet.

†

The PLL1707 and PLL1708 use the same die and they are electrically identical except for mode control.

ꢀꢖ ꢑ ꢊꢋ ꢐ ꢎꢏ ꢑꢕ ꢊ ꢌꢎꢌ ꢗꢘ ꢙꢚ ꢛ ꢜꢝ ꢞꢗꢚꢘ ꢗꢟ ꢠꢡ ꢛ ꢛ ꢢꢘꢞ ꢝꢟ ꢚꢙ ꢣꢡꢤ ꢥꢗꢠ ꢝꢞꢗ ꢚꢘ ꢦꢝ ꢞꢢꢇ ꢀꢛ ꢚꢦꢡ ꢠꢞꢟ

ꢠ ꢚꢘ ꢙꢚꢛ ꢜ ꢞꢚ ꢟ ꢣꢢ ꢠ ꢗ ꢙꢗ ꢠ ꢝ ꢞꢗ ꢚꢘꢟ ꢣ ꢢꢛ ꢞꢧꢢ ꢞꢢ ꢛ ꢜꢟ ꢚꢙ ꢎꢢꢨ ꢝꢟ ꢏꢘꢟ ꢞꢛ ꢡꢜ ꢢꢘꢞ ꢟ ꢟꢞ ꢝꢘꢦ ꢝꢛ ꢦ ꢩ ꢝꢛ ꢛ ꢝ ꢘꢞꢪꢇ

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中文翻译

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与PLL1707DBQR相关器件

型号	品牌	获取价格	描述	数据表
PLL1707DBQRG4	TI	获取价格	3.3 V Dual PLL Multi-Clock Generator 20-SSOP -25 to 85
PLL1707IDBQRQ1	TI	获取价格	3.3-V DUAL-PLL MULTICLOCK GENERATOR
PLL1707-Q1	TI	获取价格	3.3-V DUAL-PLL MULTICLOCK GENERATOR
PLL1708	BB	获取价格	3.3 V DUAL PLL MULTICLOCK GENERATOR
PLL1708	TI	获取价格	3.3-V DUAL PLL MULTICLOCK GENERATOR
PLL1708DBQ	BB	获取价格	3.3 V DUAL PLL MULTICLOCK GENERATOR
PLL1708DBQ	TI	获取价格	3.3-V DUAL PLL MULTICLOCK GENERATOR
PLL1708DBQG4	TI	获取价格	3.3 V Dual PLL Multi-Clock Generator 20-SSOP -25 to 85
PLL1708DBQR	BB	获取价格	3.3 V DUAL PLL MULTICLOCK GENERATOR
PLL1708DBQR	TI	获取价格	3.3-V DUAL PLL MULTICLOCK GENERATOR

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