Datasheet > PLL1705DBQ

PLL1705DBQ

更新时间： 2024-11-08 06:04:07

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页数	文件大小	规格书
18页	158K
描述
3.3-V DUAL PLL MULTICLOCK GENERATOR

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PLL1705DBQ 数据手册

PLL1705

PLL1706

SLES046A – AUGUST 2002 – REVISED SEPTEMBER 2002

3.3-V DUAL PLL MULTICLOCK GENERATOR

FEATURES

APPLICATIONS

DVD Players

27-MHz Master Clock Input

Generated Audio System Clock:

DVD Add-On Cards for Multimedia PCs

Digital HDTV Systems

Set-Top Boxes

– SCKO0: 768 f (f = 44.1 kHz)

– SCKO1: 384 f , 768 f (f = 44.1 kHz)

– SCKO2: 256 f (f = 32, 44.1, 48, 64, 88.2,

DESCRIPTION

96 kHz)

– SCKO3: 384 f (f = 32, 44.1, 48, 64, 88.2,

†

The PLL1705 and PLL1706 are low cost, phase-locked

loop (PLL) multiclock generators. The PLL1705 and

PLL1706 can generate four system clocks from a 27-MHz

reference input frequency. The clock outputs of the

PLL1705can be controlled by sampling frequency-control

pins and those of the PLL1706 can be controlled through

serial-modecontrolpins. Thedevicegivescustomersboth

cost and space savings by eliminating external

components and enables customers to achieve the very

low-jitterperformance needed for high performance audio

DACs and/or ADCs. The PLL1705 and PLL1706 are ideal

for MPEG-2 applications which use a 27-MHz master

clock such as DVD players, DVD add-on cards for

multimedia PCs, digital HDTV systems, and set-top

boxes.

96 kHz)

Zero PPM Error Output Clocks

Low Clock Jitter: 50 ps (Typical)

Multiple Sampling Frequencies:

– f = 32, 44.1, 48, 64, 88.2, 96 kHz

3.3-V Single Power Supply

PLL1705: Parallel Control

PLL1706: Serial Control

Package: 20-Pin SSOP (150 mil), Lead-Free

Product

FUNCTIONAL BLOCK DIAGRAM

(ML)

(MC) (MD)

FS2

FS1

CSEL

AGND

V 1–3 DGND1–3

ModeControl Interface

Power Supply

Reset

PLL2

XT1

OSC

XT2

PLL1

Divider

SCKO2

Divider

SCKO3

MCKO1 MCKO2

( ): PLL1706

SCKO0

SCKO1

Pleasebe aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments

semiconductor products and disclaimers thereto appears at the end of this data sheet.

†

The PLL1705 and PLL1706 use the same die and they are electrically identical except for mode control.

PRODUCTION DATA information is current as of publication date. Products

conform to specifications per the terms of Texas Instruments standard warranty.

Production processing does not necessarily include testing of all parameters.

12 3 4 5 6 7...18

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与PLL1705DBQ相关器件

型号	品牌	获取价格	描述	数据表
PLL1705DBQG4	TI	获取价格	3.3 V Dual PLL Multi-Clock Generator 20-SSOP -25 to 85
PLL1705DBQG4	BB	获取价格	3.3-V DUAL PLL MULTICLOCK GENERATOR
PLL1705DBQR	BB	获取价格	3.3-V DUAL PLL MULTICLOCK GENERATOR
PLL1705DBQR	TI	获取价格	3.3-V DUAL PLL MULTICLOCK GENERATOR
PLL1705DBQRG4	BB	获取价格	3.3-V DUAL PLL MULTICLOCK GENERATOR
PLL1706	BB	获取价格	3.3-V DUAL PLL MULTICLOCK GENERATOR
PLL1706	TI	获取价格	8.192MHz 至 36.864MHz、串行控制、3.3V 双路 PLL 多时钟发生器
PLL1706DBQ	TI	获取价格	3.3-V DUAL PLL MULTICLOCK GENERATOR
PLL1706DBQ	BB	获取价格	3.3-V DUAL PLL MULTICLOCK GENERATOR
PLL1706DBQG4	BB	获取价格	3.3-V DUAL PLL MULTICLOCK GENERATOR

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