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PL620-89OC PDF预览

PL620-89OC

更新时间: 2022-02-26 10:37:36
品牌 Logo 应用领域
麦瑞 - MICREL 石英晶振
页数 文件大小 规格书
6页 347K
描述
Low Phase Noise XO (9.5-65MHz Output)

PL620-89OC 数据手册

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PL620-88/-89  
Low Phase Noise XO (9.5-65MHz Output)  
PIN CONFIGURATION  
FEATURES  
Crystal input range: 19MHz to 65MHz  
VDD  
XIN  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
DNC  
Output range: 9.5MHz 65MHz  
Very low phase noise and jitter  
Complementary outputs:  
DNC  
XOUT  
DNC  
S2^  
GNDBUF  
QBAR  
VDDBUF  
Q
o
o
LVPECL (PL620-88)  
LVDS (PL620-89)  
Supports 2.5V or 3.3V Power Supply.  
Available in 16 pin TSSOP GREEN/RoHS  
compliant package.  
OE  
DNC  
GND  
GNDBUF  
GND  
TSSOP-16L  
Note: ^ denotes internal pull up  
OUTPUT ENABLE LOGIC TABLE  
DESCRIPTION  
The PL620-88 (LVPECL) and PL620-89 (LVDS) are  
XO ICs specifically designed to work with  
fundamental or 3rd OT crystals between 19MHz and  
65MHz. The selectable divide by two feature extends  
the output range from 9.5MHz to 65MHz. They  
require very low current into the crystal resulting in  
better overall stability.  
Part Number  
OE  
State  
0 (Default) Output enabled  
PL620-88  
1
0
Tri-state  
Tri-state  
PL620-89  
1 (Default) Output enabled  
OUTPUT FREQUENCY DIVIDE BY  
TWO SELECTOR (S2)  
BLOCK DIAGRAM  
S2  
Output  
O
Q
0
Intput/2  
Input  
1(Default)  
Q
Oscillator  
Amplifier  
X+  
S2  
X-  
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944-0800 • fax +1(408) 474-1000 • www.micrel.com Rev 4/28/09 Page 1  

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