PI90LVT386AEX

更新时间： 2024-02-12 06:52:56

品牌	Logo	应用领域
百利通 - PERICOM		/
页数	文件大小	规格书
8页	166K
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PI90LVT386AEX 数据手册

PI90LV386/PI90LVT386

High-Speed Differential Line Receivers

Description

Features

• Sixteen line receivers meet or exceed the requirements of the

ThePI90LVx386familyconsistsof sixteendifferentiallinereceivers

with 3-state outputs that implement Low-Voltage Differential

Signaling (LVDS). Any of the differential receivers will provide a

valid logical output state with a ±100mV differential input voltage

withintheinputcommon-modevoltagerangethatallows0to3Vof

groundpotentialdifferencebetweentwoLVDSnodes.Theindepen-

dentENpinscanbeusedtoplacetheoutputsineitheranormallogic

state (high or low logic levels) or a high-impedance state. In high-

impedance state, outputs neither load nor drive the bus lines.

The intended application of these devices, and their signaling

techniques, is for point-to-point baseband data transmission over

controlled impedance media of approximately 100-ohms with a

100-Ohmterminationresistor.ThePI90LVT386integratesthetermi-

nating resistors while the PI90LV386 requires external resistors.

The transmission media may be printed circuit board traces,

backplanes,orcables.ThePI90LV386’s16receiversintegratedinto

the same substrate allow precise timing alignment.

ANSITIA/EIA-644-1995Standard

• Designed for signaling rates up to 660 Mbps

• 0V to 3V common-mode input voltage range

• Operates from a single 3.3V supply

• Typical propagation delay time: 2.6ns

• Output skew 100ps (typical)

• Part-to-part skew is less than 1ns

• Integrated110-OhmterminationonPI90LVT386

• LowVoltageTTL(LVTTL)levelsare5Vtolerant

• Open-circuitfailsafe

• Flow-through pin out

• Packaging(Pb-free&Greenavailable):

-64-PinThinShrinkSmallOutputTSSOP(A)

PinConfiguration

These parts are characterized for operation from –40°C to 85°C.

GND

IN1+

IN1–

IN2+

IN2–

IN3+

IN3–

IN4+

IN4–

IN1+

IN1–

IN2–

BlockDiagram

GND

EN1

OUT1

OUT2

OUT3

OUT4

EN2

OUT1

OUT2

OUT3

OUT4

IN2–

IN3+

IN3–

IN4+

IN4–

64-Pin

GND

IN1+

GND

IN1–

OUT1

IN2+

IN2–

IN3+

IN3–

IN4+

OUT2

OUT3

OUT4

EN3

OUT1

IN4–

IN1+

IN1–

OUT2

OUT3

OUT4

IN2+

IN2–

IN3+

IN3–

IN4+

IN4–

EN4

GND

16 Receivers

PS8574B

10/04/04

12 3 4 5 6 7 8

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