PI90LV048A/PI90LVT048A
3V LVDS Quad Flow-Through
Differential Line Receivers
Features
Description
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500 Mbps (250 MHz) switching rates
ThePI90LV048A/PI90LVT048Aquad flow-throughdifferentialline
receivers are designed for applications requiring ultra low-power
dissipation and high data rates. The device is designed to support
data rates in excess of 500 Mbps (250 MHz) using Low Voltage
DifferentialSignaling(LVDS)technology.
Flow-through pinout simplifies PCB layout
150ps channel-to-channel skew (typical)
100psdifferentialskew(typical)
2.7nsmaximumpropagationdelay
3.3V power supply design
Thedevicesacceptlow-voltage(350mVtypical)differentialinput
signalsandtranslatesthemto3VCMOSoutputlevels.Thereceiver
supportsa3-statefunction,whichmaybeusedtomultiplexoutputs,
andalsosupportsopen, shortedandterminated(100-ohms)inputfail-
safe. The receiver output will be HIGH for all fail-safe conditions.
PI90LVT048A features integrated parallel termination resistors
(nominally 110-ohms) that eliminate the requirement for four dis-
crete termination resistors and reduce stud length. PI90LV048A
inputs are high impedance and require an external termination
resistor when used in a point-to-point connection. The devices
have a flow-through pinout for easy PCB layout.
High impedance LVDS inputs on power down
LowPowerdesign(40mW,3.3Vstatic)
Widecommon-modeinputvoltagerange:0.2Vto2.7V
Acceptssmallswing(350mVtypical)differentialsignallevels
Supports open, short and terminated input fail-safe
Low-power state when in fail-safe
ConformstoANSI/TIA/EIA-644Standard
Industrial temperature operating range (–40°C to +85°C)
Packaging(Pb-free&Greenavailable):
-16-pinSOIC(W)
-16-pinTSSOP(L)
The EN and EN inputs are ANDed together and control the 3-state
outputs. The enables are common to all four receivers. The
PI90LV048AandcompanionLVDSlinedriver(eg.PI90LV047A)
provide a new alternative to high-power PECL/ECL devices for
high-speed point-to-point interface applications.
BlockDiagram
RIN1+
4 Places
PI90LVT048A
Only
100Ω
ROUT1
ROUT2
ROUT3
ROUT4
R1
R2
R3
R4
RIN1–
RIN2+
RIN2–
PinConfiguration
R
IN1–
R
IN1+
R
IN2+
R
IN2–
R
IN3–
R
IN3+
R
IN4+
R
IN4–
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
EN
R
RIN3+
RIN3–
OUT1
R
V
OUT2
CC
RIN4+
RIN4–
GND
R
OUT3
R
OUT4
EN
EN
EN
TruthTable
Enables
Inputs
Outputs
EN
H
EN
L or Open
RIN+ – RIN–
VID ≥ 0.1V
VID ≤ –0.1V
ROUT
H
L
Full fail-safe OPEN/SHORT or terminated
X
H
All other combinations of ENABLE inputs
Z
PS8608A
10/04/04
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