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PI90LVB022

更新时间： 2024-09-30 22:30:55

品牌	Logo	应用领域
百利通 - PERICOM		复用器
页数	文件大小	规格书
12页	182K
描述
LVDS Mux/Repeater

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中文翻译

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数据手册

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PI90LVB022 数据手册

PI90LV022, PI90LVB022

LVDS Mux/Repeater

Description

Features

• Meets or Exceeds the Requirements of ANSI TIA/

The PI90LV022 and PI90LVB022 are differential line drivers and

receivers that use Low Voltage Differential Signaling (LVDS) to

achieve signaling rates as high as 650 Mbps. The receiver outputs

can be switched to either or both drivers through the multiplexer

control signals S0 and S1. This allows the flexibility to perform

splitter or signal routing functions with a single device.

EIA-644-1995

• Designed for Signaling Rates up to 650 Mbit/s (325 MHz)

• Operatesfroma3.3VSupply:–40°Cto+85°C

• LowVoltageDifferentialSignalingwithOutputVoltages

of±350mVinto:

TheLVDSstandardprovidesaminimumdifferentialoutputvoltage

magnitudeof247mVintoa100Ohmloadandreceiptof100mVDC

signals with up to 1V of ground potential difference between a

transmitterandreceiver. ThePI90LVB022doublestheoutputdrive

current to achieve Bus LVDS signaling levels with a 50 Ohm load.

AdoublyterminatedBusLVDSlineenablesmulti-pointconfigura-

tions. Switchingbetweenchannelsdoesnotcreatefalsetransitions

on the outputs.

-100Ohmload(PI90LV022)

-50OhmloadBusLVDSSignaling(PI90LVB022)

• Accepts±350mVdifferentialinputs

• Wide common mode input voltage range: 0.2V to 2.7V

• Output drivers are high impedance when disabled or

whenV ≤1.5V

• Inputs are open, short, and terminated fail safe

• PropagationDelayTime:3.5ns

• ESD protection is 10kV on bus pins

The intended application of these devices and signaling technique

is for both point-to-point base-band (PI90LV022) and multipoint

(PI90LVB022)datatransmissionsovercontrolledimpedancemedia.

• Bus Pins are High Impedance when disabled or

with V less than 1.5V

• TTL Inputs are 5V I/O Tolerant

• Power Dissipation at 400Mbit/s less than 150mW

• Industrial temperature rating

• Packaging(Pb-free&Greenavailable):

-16-pinSOIC(W)

- 16-pinTSSOP(L)

BlockDiagram

PinConfiguration

1DE

–

16-Pin

L,W

1DE

–

2DE

GND

S0 S1

PS8488B

09/28/04

12 3 4 5 6 7...12

中文翻译

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