Datasheet > 驱动程序和接口 > 线路驱动器或接收器> PI90LV387

PI90LV387

更新时间： 2024-09-30 22:44:27

品牌	Logo	应用领域
百利通 - PERICOM		驱动器
页数	文件大小	规格书
7页	369K
描述
High-Speed Differential Line Drivers

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中文翻译

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数据手册

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PI90LV387 数据手册

PI90LV387/ PI90LVB387

High-Speed Differential Line Drivers

Features

Description

• Sixteen line drivers meet or exceed the requirements of the

ANSI EIA/TIA-644 Standard

PI90LV387/ PI90LVB387 consists of sixteen differential line

drivers that implement the electrical characteristics of low-volt-

age differential signaling (LVDS). This signaling technique lowers

output voltage levels to reduce power, increase switching speeds,

and allow operation with a 3V supply rail.

• Designed for signaling rates up to 500 Mbps with very low

radiation (EMI)

• Low voltage differential signaling with typical output voltage

of 350mV into :

The intended application of this device and signaling technique

is for point-to-point baseband (single termination) and multi-

point (double termination) data transmission over a controlled

impedance media of approximately 100Ω and 50Ω (LVB387).

The transmission media may be printed-circuit board traces, back-

planes, or cables. The large number of drivers integrated into the

same substrate, with the low pulse skew of balanced signaling,

allows extremely precise timing alignment of clock and data for

synchronous parallel data transfers. When used with its companion

16-channel receivers, the PI90LV386 or PI90LVT386, over 400

million data transfers per second in single-edge clocked systems

are possible with very little power.

– 100Ω load (PI90LV387)

– 50Ω load (PI90LVB387)

• Propagation delay times less than 2.6ns

• Output skew is less than 150ps

• Part-to-part skew is less than 1.5ns

• 35mW total power dissipation in each driver operating at 200

MHz

• Bus-pin ESD protection exceeds 10kV

• Low voltage TTL (LVTTL) logic inputs are 5V tolerant

• Packaging (Pb-free & Green available):

-64-Pin TSSOP (A)

(Note: The ultimate rate and distance of data transfer is dependent

upon attenuation characteristics of the media, the noise coupling

to the environment, and other system characteristics.)

Pin Diagram

GND

VCC

1DO1+

1DO1 –

1DO2+

1DO2 –

The drivers are enabled in groups of ﬁve. When disabled, driver

VCC

outputs are at a high impedance. Each driver input (D ) and en-

GND

able (EN) have an internal pulldown that drives the input to a low

level when open circuited.

EN1

60 1DO3+

58 1DO4+

1DIN1

1DIN2

1DIN3

1DIN4

EN2

1DO3 –

The parts are characterized for operation from –40°C to 85°C.

1DO4 –

56 2DO1+

55 2DO1 –

2DIN1 11

2DIN2 12

2DIN3 13

2DIN4 14

2DO2+

2DO2–

2DO3+

Block Diagram

64-Pin

51 2DO3 –

49 2DO4 –

47 3DO1 –

45 3DO2 –

D_O1+

D_IN1

VCC 16

VCC

GND

2DO4+

D_O1–

3DO1+

GND 18

3DIN1 19

3DIN2 20

3DIN3 21

3DIN4 22

EN3 23

3DO2+

D_O2+

D_IN2

3DO3+

3DO3 –

3DO4+

3DO4 –

4DO1+

4DO1 –

4DO2+

4DO2 –

4DO3+

4DO3 –

4DO4+

4DO4 –

D_O2–

D_O3+

4DIN1 24

D_IN3

D_O3–

4DIN2

4DIN3

4DIN4

EN3

GND

VCC

D_O4+

D_IN4

D_O4–

VCC

GND

1 of 4

PS8573C

09/22/04

12 3 4 5 6 7

中文翻译

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与PI90LV387相关器件

型号	品牌	获取价格	描述	数据表
PI90LV387A	PERICOM	获取价格	High-Speed Differential Line Drivers
PI90LV387AE	PERICOM	获取价格	High-Speed Differential Line Drivers
PI90LV9637	PERICOM	获取价格	LVDS High-Speed Differential Line Receivers
PI90LV9637U	PERICOM	获取价格	LVDS High-Speed Differential Line Receivers
PI90LV9637UE	PERICOM	获取价格	LVDS High-Speed Differential Line Receivers
PI90LV9637W	PERICOM	获取价格	LVDS High-Speed Differential Line Receivers
PI90LV9637WE	PERICOM	获取价格	LVDS High-Speed Differential Line Receivers
PI90LV9638	ETC	获取价格	LVDS \| Dual LVDS Driver
PI90LV9638U	PERICOM	获取价格	Line Driver, 2 Func, 2 Driver, CMOS, PDSO8, MSOP-8
PI90LV9638UE	PERICOM	获取价格	Line Driver, 2 Func, 2 Driver, PDSO8, GREEN, MSOP-8

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