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PI90LV179U PDF预览

PI90LV179U

更新时间： 2024-11-15 22:37:11
品牌 Logo 应用领域
百利通 - PERICOM 线路驱动器或接收器驱动程序和接口接口集成电路光电二极管
页数 文件大小 规格书
14页 243K
描述
3.3V LVDS High-Speed Differential Line Drivers and Receivers

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中文翻译

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PI90LV179U 技术参数

是否Rohs认证：不符合生命周期：Obsolete
零件包装代码：MSOP包装说明：TSSOP, SSOP8,.19
针数：8Reach Compliance Code：compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.79Is Samacsys：N
差分输出：YES驱动器位数：1
高电平输入电流最大值：0.00002 A输入特性：DIFFERENTIAL
接口集成电路类型：LINE TRANSCEIVER接口标准：EIA-644; TIA-644; IEEE 1596.3
JESD-30 代码：S-PDSO-G8JESD-609代码：e0
长度：3 mm功能数量：1
端子数量：8最高工作温度：85 °C
最低工作温度：-40 °C最小输出摆幅：0.25 V
最大输出低电流：0.008 A封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：SSOP8,.19
封装形状：SQUARE封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：NOT SPECIFIED电源：3.3 V
认证状态：Not Qualified最大接收延迟：3.1 ns
接收器位数：1座面最大高度：1.1 mm
子类别：Line Driver or Receivers最大压摆率：12 mA
最大供电电压：3.6 V最小供电电压：3 V
标称供电电压：3.3 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Tin/Lead (Sn/Pb)端子形式：GULL WING
端子节距：0.65 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED最大传输延迟：2.5 ns
宽度：3 mmBase Number Matches：1

PI90LV179U 数据手册

 浏览型号PI90LV179U的Datasheet PDF文件第2页浏览型号PI90LV179U的Datasheet PDF文件第3页浏览型号PI90LV179U的Datasheet PDF文件第4页浏览型号PI90LV179U的Datasheet PDF文件第5页浏览型号PI90LV179U的Datasheet PDF文件第6页浏览型号PI90LV179U的Datasheet PDF文件第7页 
PI90LV179, PI90LV180,  
PI90LV050, PI90LV051  
3.3V LVDS High-Speed Differential Line Drivers and Receivers  
ProductFeatures  
ProductDescription  
• SignalingRates >660Mbps(330MHz)  
• Single3.3VPowerSupplyDesign  
ThePI90LV179,PI90LV180,PI90LV050,andPI90LV051aredifferen-  
tial line drivers and receivers (transceivers) that are compliant with  
theIEEE1596.3SCIandANSI/TIA/EIA-644LVDSstandards.These  
devices use low-voltage differential signaling (LVDS) to achieve  
dataratesinexcessof660Mbpswhilebeinglesssusceptibletonoise  
than single-ended transmission.  
• Driver:  
— ±350mVDifferentialSwingintoa100-Ohmload  
— Propogation Delay of 1.5ns Typ.  
— LowVoltageTTL(LVTTL)Inputsare5VTolerant  
The drivers translate a low-voltage TTL/CMOS input into a low-  
voltage (350mV typical) differential output signal. The receivers  
translateadifferential350mVinputsignaltoa3VCMOSoutputlevel.  
The driver section can be independently set to a power-down and  
— Driver is High Impedance when Disabled or V <1.5V  
CC  
• Receiver:  
— Accepts±50mV(min.)DifferentialSwingwithupto2.0V  
ground potential difference  
— Propagation Delay of 3.3ns Typ.  
— LowVoltageTTL(LVTTL)Outputs  
— Open, Short, and Terminated Fail Safe  
high-impedance output mode with the D pin (active HIGH). The  
EN  
receiver section is controlled by the R  
pin (active LOW).  
EN*  
• IndustrialTemperatureOperatingRange:–40°Cto85°C  
• PackageOptions:SOIC,TSSOP,MSOP  
Applications  
Applications include point-to-point and multidrop baseband data  
transmission over a controlled impedance media of approximately  
100 ohms. These include intra-system connections via printed  
circuit board traces or cables, hubs and routers for data communi-  
cations;PBXs,switches,repeatersandbasestationsfortelecommu-  
nications and other applications such as digital cameras, printers  
and copiers.  
• MeetsorExceedsIEEE1596.3SCIStandard  
• MeetsorExceedsANSI/TIA/EIA-644LVDSStandard  
• Bus-TerminalESDexceeds12kV  
PI90LV179  
PI90LV050  
D
D
OUT1+  
OUT1-  
D
IN1  
R
R
V
IN1  
IN1+  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
CC  
IN1  
D
D
D
OUT+  
EN  
V
D
IN  
D
D
D
D
D
D
D
R
R
D
D
1
2
3
4
8
7
6
5
CC  
IN+  
D
D
R
D
OUT1  
R
OUT2+  
OUT2-  
OUT1+  
OUT1  
EN  
OUT2  
OUT2+  
IN2  
OUT-  
R
IN2  
8-Pin  
U,W  
OUT  
16-Pin  
L,W  
IN  
EN*  
D
IN  
R
R
R
OUT  
OUT+  
OUT2  
IN2+  
R
R
R
R
IN+  
IN-  
GND  
IN1+  
IN1-  
R
R
R
OUT1  
OUT  
IN2  
R
GND  
EN*  
R
R
IN2+  
IN2-  
OUT2  
PI90LV180  
PI90LV051  
D
OUT1+  
OUT1-  
D
IN1  
D
D
D
OUT+  
OUT-  
NC  
1
R
D
V
V
R
R
D
D
V
CC  
D
14  
IN1  
1
2
3
4
5
6
7
8
16  
CC  
CC  
IN+  
IN  
OUT  
EN1  
IN  
R
R
R
R
2
3
4
5
6
7
13  
12  
11  
10  
9
15  
14  
13  
12  
11  
10  
9
D
OUT  
EN*  
IN1+  
IN1+  
IN1  
R
OUT1  
D
R
D
D
OUT1  
EN  
OUT1+  
OUT1  
EN2  
14-Pin  
L,W  
R
16-Pin  
L,W  
IN1-  
D
D
D
D
D
D
D
EN  
IN  
EN1  
R
EN*  
R
R
R
D
OUT2  
IN2+  
OUT2+  
D
IN2  
R
R
IN+  
GND  
GND  
OUT+  
OUT2  
OUT2+  
IN2  
D
R
OUT2-  
OUT  
8
NC  
IN2  
IN-  
D
EN2  
GND  
R
R
IN2+  
IN2-  
R
OUT2  
PS8539  
05/01/01  
1
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中文翻译

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