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PI90LV044L PDF预览

PI90LV044L

更新时间: 2024-01-03 03:43:20
品牌 Logo 应用领域
百利通 - PERICOM 开关中继器
页数 文件大小 规格书
12页 437K
描述
LVDS Dual 2x2 Crosspoint/Repeater Switch

PI90LV044L 数据手册

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PI90LV044, PI90LVB044  
LVDS Dual 2x2 Crosspoint/Repeater Switch  
Description  
Features  
Dual 2x2 Crosspoint/Repeater Switch  
The PI90LV044 and PI90LVB044 are monolithic dual 2x2 asyn-  
chronous crosspoint/repeater switches. The crosspoint function  
is based on a multiplexer tree architecture. Each 2x2 switch can  
be considered as a pair of 2:1 multiplexers that share the same  
inputs. The signal path through each switch is fully differential  
with minimal propagation delay. The signal path is unregistered,  
so no clock is required for the data inputs. The signal line drivers  
and receivers use Low Voltage Differential Signaling (LVDS) to  
achieve signaling rates as high as 650Mbps.  
Meets or Exceeds the Requirements of  
ANSI TIA/EIA-644-1995  
Designed for Signaling Rates up to 650 Mbit/s (325Mhz)  
Operates from a single 3.3V Supply: –40°C to 85°C  
Low-Voltage Differential Signaling with Output Voltages of  
±350mV into:  
- 100Ω load (PI90LV044)  
The LVDS standard provides a minimum differential output volt-  
age magnitude of 247 mV into a 100Ω load and receipt of 100  
mV signals with up to 1V of ground potential difference between a  
transmitterandreceiver.ThePI90LVB044doublestheoutputdrive  
current to achieve LVDS levels with a 50 ohm load.  
- 50Ω load Bus LVDS Signaling (PI90LVB044)  
Accepts ±350mV differential inputs  
Wide common mode input range: 0.2V to 2.7V  
Output drivers are high impedance when disabled or  
when V 1.5V  
CC  
The intended application of these devices is for loop-through and  
redundant channel switching for both point-to-point baseband  
(PI90LV044) and multipoint (PI90LVB044) data transmissions  
over controlled impedance media.  
Inputs are open, short, and terminated fail safe  
Propagation Delay Time: 3.5ns  
ESD protection is 10kV on bus pins  
Bus Pins are High Impedance when disabled or  
with V less than 1.5V  
CC  
TTL Inputs are 5V Tolerant  
Power Dissipation at 400 Mbit/s of 250mW  
Packaging (Pb-free & Green available):  
- 28-pin QSOP (Q)  
Pin Configuration  
- 28-pin TSSOP (L)  
1B  
1A  
1
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
V
CC  
Block Diagram  
2
1Y  
S0  
3
1Z  
S0,S1  
1A/1B  
1DE/2DE  
1Y/1Z  
1DE  
S1  
4
2DE  
2Z  
5
2A  
6
2Y  
2B  
7
GND  
2A/2B  
3A/3B  
2Y/2Z  
3Y/3Z  
3A  
8
V
CC  
3B  
9
3Y  
S2  
10  
11  
12  
13  
14  
3Z  
3DE  
S3  
4DE  
4Y  
4A/4B  
S2/S3  
4Y/4Z  
4A  
4Z  
4B  
GND  
3DE/4DE  
PS8485D  
09/22/04  
1

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