PI90LV02/PI90LVT02
TM
SOTiny LVDS High-Speed
Differential Line Receiver
Features
Description
• Meets or Exceeds the Requirements of ANSI
TIA/EIA-644-1995Standard
ThePI90LV02andPI90LVT02aresingledifferentiallinereceivers
that use low-voltage differential signaling (LVDS) to support data
rates up to 400 Mbps. These products are designed for applications
requiring high-speed, low-power consumption, low-noise genera-
tion, and a small package.
• Signaling rates up to 400 Mbps
• InterfacestoLVDS,LVPECL
• Bus-TerminalESDexceeds10kV
• Differential Input Voltage Threshold less than 100mV
• Typical Propagation Delay Times of 2.6ns
• TypicalPowerDissipationof40mW@200MHz
• LowVoltageTTL(LVTTL)Levelis5VTolerant
• Open-CircuitFailSafe
A differential input signal (350mV) is translated by the device to a
3.3VCMOSoutputlevel.ThePI90LVT02integratestheterminating
resistor while the PI90LV02 requires an external resistor.
Applications
Applications include point-to-point and multi-drop baseband data
transmissions over impedance media of approximately 100-ohms.
The transmission media can be printed circuit board traces,
backplanes, or cables.
• OutputareHighImpedancewithV <1.5V
CC
• Integrated110-ohmLineTerminationResistor(PI90LVT02)
• Operates from a 3.3V supply
• Inputcommon-modevoltagerange0V–3.2V
• IndustrialTemperatureOperatingRange:–40°Cto85°C
ThePI90LV02andPI90LVT02andcompanionlinedrivers(PI90LV01
andPI90LVB01)providenewalternativestoRS-232,PECL,andECL
devices for high-speed, point-to-point interface applications.
• Packaging(Pb-free&Greenavailable):
- 5-pin space-saving SOT-23 (T)
Pinout
LogicDiagram
PI90LV02
3
A
5
R
R
OUT
OUT
V
R
B
5
4
1
2
3
CC
OUT
4
B
GND
A
PI90LVT02
3
4
A
B
5
110-ohm
FunctionTable
Inputs
Outputs
VID =VA –VB
VID >50mV
ROUT
H
?
–50mV < VID < 50mV
VID ≤ –50mV
Open
L
H
H = high level
L = low level
? = indeterminate
PS8659B
09/28/04
1