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PI74VCX16373VEX

更新时间： 2024-11-11 13:12:19
品牌 Logo 应用领域
百利通 - PERICOM 锁存器
页数 文件大小 规格书
8页 260K
描述
Bus Driver, ALVC/VCX/A Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48, 0.300 INCH, 0.635 MM PITCH, PLASTIC, SSOP-48

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PI74VCX16373VEX 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Obsolete零件包装代码：SSOP
包装说明：SSOP,针数：48
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.84
Is Samacsys：N系列：ALVC/VCX/A
JESD-30 代码：R-PDSO-G48长度：15.875 mm
逻辑集成电路类型：BUS DRIVER位数：8
功能数量：2端口数量：2
端子数量：48最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：SSOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, SHRINK PITCH峰值回流温度（摄氏度）：NOT SPECIFIED
传播延迟（tpd）：6.3 ns认证状态：Not Qualified
座面最大高度：2.794 mm最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：1.8 V标称供电电压 (Vsup)：2.5 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子形式：GULL WING
端子节距：0.635 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：7.5 mm
Base Number Matches：1

PI74VCX16373VEX 数据手册

 浏览型号PI74VCX16373VEX的Datasheet PDF文件第2页浏览型号PI74VCX16373VEX的Datasheet PDF文件第3页浏览型号PI74VCX16373VEX的Datasheet PDF文件第4页浏览型号PI74VCX16373VEX的Datasheet PDF文件第5页浏览型号PI74VCX16373VEX的Datasheet PDF文件第6页浏览型号PI74VCX16373VEX的Datasheet PDF文件第7页 
PI74VCX16373  
16-Bit Transparent D-Type Latch  
with 3-State Outputs  
Features  
Description  
• The PI74VCX Family is designed for low voltage  
PericomSemiconductor’sPI74VCX16373isparticularlysuitable  
for implementing buffer registers, I/O ports, bidirectional bus  
drivers, and working registers. This device can be used as two 8-  
bit latches or one 16-bit latch. When the Latch Enable (LE) input  
is HIGH, the Q outputs follow the (D) inputs. When LE is taken  
LOW, the Q outputs are latched at the levels set up at the D inputs.  
operation, V  
= 1.8V to 3.6V  
DD  
• 3.6V I/O Tolerant Inputs and Outputs  
• Supports Live Insertion  
• Balanced Drive, ±24mA  
• Uses patented Noise Reduction Circuitry  
AbufferedOutputEnable(OE)inputcanbeusedtoplacetheeight  
outputs in either a normal logic state (high or low logic levels) or  
a high-impedance state in which the outputs neither load nor drive  
the bus lines significantly. The high-impedance state and the  
increased drive provide the capability to drive bus lines without  
need for interface or pullup components. OE does not affect  
internal operations of the latch. Old data can be retained or new  
data can be entered while the outputs are in the high impedance  
state.  
• Typical V  
(Output Ground Bounce)  
OLP  
< 0.6V at V  
= 2.5V, T = 25ºC  
DD  
A
• Typical V  
(Output V Undershoot)  
OHV  
OH  
<–0.6VatV =2.5V,T =25ºC  
DD  
A
• Power-Off high impedance inputs and outputs  
• Industrial operation at –40°C to +85°C  
• Packaging(Pb-free&Greenavailable):  
–48-pin240-milwideplasticTSSOP(A)  
To ensure the high-impedance state during power up or power  
down, OE should be tied to V  
through a pullup resistor; the  
DD  
minimumvalueoftheresistorisdeterminedbythecurrent-sinking  
capability of the driver.  
BlockDiagram  
The PI74VCX family is I/O Tolerant, allowing it to operate in  
mixed 1.8V/3.6V systems.  
1
1OE  
48  
1LE  
C1  
2
1Q1  
47  
1D1  
1D  
To Seven Other Channels  
24  
25  
2OE  
2LE  
C1  
1D  
13  
2Q1  
36  
2D1  
To Seven Other Channels  
PS8326C  
10/27/06  
06-0203  
1
12345678

中文翻译

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