PI74FCT377T
OCTAL D FLIP-FLOP with CLOCK ENABLE
PI74FCT377T
Fast CMOS Octal D Flip-Flop
with Clock Enable
ProductFeatures:
ThePI74FCT377TispincompatiblewithbipolarFAST
Series at a higher speed and lower power
consumption
TTL input and output levels
OctalDflip-flopswithClockEnable
Product Description:
PericomSemiconductorsPI74FCTseriesoflogiccircuitsarepro-
ducedintheCompanysadvanced 0.6/0.8micron CMOStechnology,
achieving industry leading speed grades.
Extremelylowstaticpower
Hysteresis on all inputs
Industrial operating temperature range: 40°C to +85°C
Packagesavailable:
The PI74FCT377T is an 8-bit wide octal designed with eight edge-
triggered D-type flip-flops with individual D inputs and O outputs.
When Clock Enable (CE) is LOW, the common buffered Clock
(CP) loads all flip-flops simultaneously. The register is fully edge-
triggered. D input state, one setup time before the LOW-to-HIGH
clock transition, is transferred to the corresponding flip-flops O
output. The CE input must be stable only one setup time prior to
the LOW-to-HIGH transition for predictable operation.
20-pin173milwideplasticTSSOP(L)
20-pin300milwideplasticDIP(P)
20-pin150milwideplasticQSOP(Q)
20-pin150milwideplasticTQSOP(R)
20-pin300milwideplasticSOIC(S)
Logic Block Diagram
D0
D1
D2
D3
D4
D5
D6
D7
CE
D
D
D
D
D
D
D
D
Q
Q
Q
Q
Q
Q
Q
Q
CP
CP
CP
CP
CP
CP
CP
CP
CP
O0
O1
O2
O3
O4
O5
O6
O7
Truth Table(1)
Product Pin Configuration
Product Pin Description
Inputs
Outputs
ON
Pin Name
CE
Description
CE
1
2
3
4
5
6
7
8
9
10
20 Vcc
Mode
CP
CE
DN
h
Clock Enable (Active LOW)
Clock Pulse Input
Data Inputs
O0
D0
D1
O1
O2
D2
D3
O3
19
18
17
16
15
14
13
12
11
O7
Load "1"
Load "0"
Hold
↑
↑
l
l
H
CP
20-PIN
L20
P20
Q20
R20
S20
D7
l
L
D0-D7
O0-O7
GND
V
D6
↑
h
H
X
X
NC
NC
O
O
6
5
Data Outputs
Ground
(Do Nothing)
H
D
D
5
4
Power
1. H = HIGH Voltage Level
h = HIGH Voltage Level one setup time
prior to the LOW-to-HIGH Clock
Transition
O
4
GND
CP
L = LOW Voltage Level
l = LOW Voltage Level one setup time
prior to the LOW-to-HIGH Clock
Transition
X = Don't Care
NC = No Change
↑ = LOW-to-HIGH Clock Transition
PS2017A 03/11/96
1