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PI74FCT162543CTAX PDF预览

PI74FCT162543CTAX

更新时间: 2024-01-11 08:13:55
品牌 Logo 应用领域
百利通 - PERICOM /
页数 文件大小 规格书
7页 78K
描述
Registered Bus Transceiver, FCT Series, 2-Func, 8-Bit, True Output, CMOS, PDSO56, 0.240 INCH, PLASTIC, TSSOP-56

PI74FCT162543CTAX 技术参数

生命周期:Obsolete零件包装代码:SSOP
包装说明:SSOP,针数:56
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.2
其他特性:INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION; MASTER CONTROL FOR LATCH系列:FCT
JESD-30 代码:R-PDSO-G56JESD-609代码:e0
长度:18.415 mm负载电容(CL):50 pF
逻辑集成电路类型:REGISTERED BUS TRANSCEIVER位数:8
功能数量:2端口数量:2
端子数量:56最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE WITH SERIES RESISTOR
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH传播延迟(tpd):12.5 ns
认证状态:Not Qualified座面最大高度:2.74 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:TIN LEAD端子形式:GULL WING
端子节距:0.635 mm端子位置:DUAL
宽度:7.5 mmBase Number Matches:1

PI74FCT162543CTAX 数据手册

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PI74FCT16543T  
PI74FCT162543T  
PI74FCT162H543T  
Fast CMOS 16-Bit  
Latched Transceivers  
ProductFeatures:  
Product Description:  
Pericom Semiconductor’s PI74FCT series of logic circuits are pro-  
duced in the Company’s advanced 0.6 micron CMOS technology,  
achieving industry leading speed grades.  
CommonFeatures:  
• PI74FCT16543T,PI74FCT162543TandPI74FCT162H543T  
are high-speed,  
low power devices with high current drive.  
ThePI74FCT16543T,PI74FCT162543TandPI74FCT162H543Tare16-  
bit latched transceivers organized with two sets of eight  
D-type latches with separate input and output controls for each set.  
For data flow from A to B, for example, the A-to-B Enable  
(xCEAB) input must be LOW in order to enter data from xAx or to  
take data from xBx, as indicated in the Truth Table. With xCEAB  
LOW, a LOW signal makes the A-to-B latches transparent; a  
subsequentLOW-to-HIGHtransitionofthexLEABsignalputsthe  
Alatchesinthestoragemodeandtheiroutputsnolongerchangethe  
Ainputs.WithxCEABandxOEABbothLOW,the3-stateBoutput  
buffers are active and reflect the data present at the output of the A  
latches. Control of data from B to A is similar, but uses the xCEBA,  
xLEBA, and xOEBA inputs.  
• VCC =5V±10%  
• Hysteresis on all inputs  
• Packagesavailable:  
56-pin240milwideplasticTSSOP(A)  
56-pin300milwideplasticSSOP(V)  
PI74FCT16543TFeatures:  
• High output drive: IOH = –32 mA; IOL = 64 mA  
• Power off disable outputs permit “live insertion”  
• Typical VOLP (Output Ground Bounce) < 1.0V  
atVCC =5V,TA =25°C  
PI74FCT162543TFeatures:  
ThePI74FCT16543ToutputbuffersaredesignedwithaPower-Off  
disable allowing “live insertion”of boards when used as backplane  
drivers.  
• Balanced output drivers: ±24 mA  
• Reduced system switching noise  
The PI74FCT162543T has ±24 mA balanced output drivers. It is  
designed with current limiting resistors at its outputs to control the  
output edge rate resulting in lower ground bounce and undershoot.  
This eliminates the need for external terminating resistors for most  
interface applications.  
• Typical VOLP (Output Ground Bounce) < 0.6V  
atVCC =5V,TA =25°C  
PI74FCT162H543TFeatures:  
Bus Hold retains last active state during 3-state  
• Eliminates the need for external pull-up resistors  
The PI74FCT162H543T has “Bus Hold” which retains the input’s  
last state whenever the input goes to high-impedance preventing  
“floating” inputs and eliminating the need for pull-up/down  
resistors.  
Logic Block Diagram  
1OEBA  
2OEBA  
1CEBA  
2CEBA  
1LEBA  
2LEBA  
1OEAB  
2OEAB  
1CEAB  
2CEAB  
1
LEAB  
2LEAB  
C
D
C
D
1B  
0
2B0  
1A  
0
2A0  
C
D
C
D
TO 7 OTHER CHANNELS  
TO 7 OTHER CHANNELS  
PS2038B  
01/10/01  
1

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