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PI74FCT16240CTAX PDF预览

PI74FCT16240CTAX

更新时间: 2024-10-28 13:12:19
品牌 Logo 应用领域
百利通 - PERICOM 驱动器
页数 文件大小 规格书
6页 67K
描述
Bus Driver, FCT Series, 4-Func, 4-Bit, Inverted Output, CMOS, PDSO48, 0.240 INCH, PLASTIC, TSSOP-48

PI74FCT16240CTAX 技术参数

生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP,针数:48
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.6
其他特性:POWER OFF DISABLE OUTPUTS TO PERMIT LIVE INSERTION; MAX OUTPUT SKEW = 0.5NS系列:FCT
JESD-30 代码:R-PDSO-G48JESD-609代码:e0
长度:12.5 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER位数:4
功能数量:4端口数量:2
端子数量:48最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:INVERTED封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH传播延迟(tpd):4.3 ns
认证状态:Not Qualified座面最大高度:1.2 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:TIN LEAD端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
宽度:6.1 mmBase Number Matches:1

PI74FCT16240CTAX 数据手册

 浏览型号PI74FCT16240CTAX的Datasheet PDF文件第2页浏览型号PI74FCT16240CTAX的Datasheet PDF文件第3页浏览型号PI74FCT16240CTAX的Datasheet PDF文件第4页浏览型号PI74FCT16240CTAX的Datasheet PDF文件第5页浏览型号PI74FCT16240CTAX的Datasheet PDF文件第6页 
PI74FCT16240T  
PI74FCT162240T  
PI74FCT162H240T  
Fast CMOS 16-Bit  
Buffer/Line Drivers  
ProductFeatures:  
CommonFeatures:  
• PI74FCT16240T,PI74FCT162240T,andPI74FCT162H240T  
are high-speed,  
low power devices with high current drive  
• VCC =5V±10%  
Product Description:  
Pericom Semiconductor’s PI74FCT series of logic circuits are pro-  
duced in the Company’s advanced 0.6 micron CMOS technology,  
achieving industry leading speed grades.  
• Hysteresis on all inputs  
• Packagesavailable:  
48-pin240milwideplasticTSSOP(A)  
48-pin300milwideplasticSSOP(V)  
PI74FCT16240TFeatures:  
• High output drive: IOH = –32 mA; IOL = 64 mA  
• Power off disable outputs permit "live insertion"  
• Typical VOLP (Output Ground Bounce) < 1.0V  
atVCC =5V,TA =25°C  
ThePI74FCT16240T,PI74FCT162240T,andPI74FCT162H240T  
are inverting 16-bit buffer/line drivers designed for applications  
driving high capacitance loads and low impedance backplanes.  
Thesehigh-speed,lowpowerdevicesofferbus/backplaneinterface  
capabilityandaflow-throughorganizationforeaseofboardlayout.  
These devices are designed with three-state controls to operate in  
a Quad-Nibble, Dual-Byte, or a single 16-bit word mode.  
The PI74FCT16240T output buffers are designed with a Power-  
Off disable allowing “live insertion” of boards when used as  
backplane drivers.  
PI74FCT162240TFeatures:  
The PI74FCT162240T has ±24 mA balanced output drivers. It is  
designed with current limiting resistors at its outputs to control the  
output edge rate resulting in lower ground bounce and undershoot.  
This eliminates the need for external terminating resistors for most  
interface applications.  
• Balanced output drivers: ±24 mA  
• Reduced system switching noise  
• Typical VOLP (Output Ground Bounce) < 0.6V  
atVCC =5V,TA =25°C  
PI74FCT162H240TFeatures:  
The PI74FCT162H240T has “Bus Hold” which retains the input's  
last state whenever the input goes to high-impedance preventing  
“floatinginputsandeliminatingtheneedforpull-up/downresistors.  
• Bus Hold retains last active bus state during 3-state  
• Eliminates the need for external pull-up resistors  
Logic Block Diagram  
1OE  
3OE  
1A0  
1A1  
1A2  
1A3  
1Y0  
1Y1  
1Y2  
1Y3  
3A0  
3A1  
3A2  
3A3  
3Y0  
3Y1  
3Y2  
3Y3  
2OE  
4OE  
2A0  
2A1  
2A2  
2A3  
2Y0  
2Y1  
2Y2  
2Y3  
4A0  
4A1  
4A2  
4A3  
4Y0  
4Y1  
4Y2  
4Y3  
PS2030A 03/11/96  
1

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暂无描述
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