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PI74FCT162374ETVE PDF预览

PI74FCT162374ETVE

更新时间: 2024-10-28 13:12:19
品牌 Logo 应用领域
百利通 - PERICOM /
页数 文件大小 规格书
7页 93K
描述
Bus Driver, FCT Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48, 0.300 INCH, PLASTIC, SSOP-48

PI74FCT162374ETVE 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SSOP
包装说明:SSOP,针数:48
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.27
其他特性:MAX OUTPUT SKEW = 0.5NS; TYPICAL VOLP < 0.6V AT VCC = 5V, TA = 25 DEGREE C系列:FCT
JESD-30 代码:R-PDSO-G48JESD-609代码:e3
长度:15.875 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER湿度敏感等级:1
位数:8功能数量:2
端口数量:2端子数量:48
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE WITH SERIES RESISTOR输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
峰值回流温度(摄氏度):260传播延迟(tpd):3.7 ns
认证状态:Not Qualified座面最大高度:2.74 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:MATTE TIN端子形式:GULL WING
端子节距:0.635 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:7.5 mm
Base Number Matches:1

PI74FCT162374ETVE 数据手册

 浏览型号PI74FCT162374ETVE的Datasheet PDF文件第2页浏览型号PI74FCT162374ETVE的Datasheet PDF文件第3页浏览型号PI74FCT162374ETVE的Datasheet PDF文件第4页浏览型号PI74FCT162374ETVE的Datasheet PDF文件第5页浏览型号PI74FCT162374ETVE的Datasheet PDF文件第6页浏览型号PI74FCT162374ETVE的Datasheet PDF文件第7页 
PI74FCT16374T  
PI74FCT162374T  
PI74FCT162H374T  
Fast CMOS 16-Bit  
Registers (3-State)  
ProductFeatures:  
CommonFeatures:  
Product Description:  
• PI74FCT16374T,PI74FCT162374T,andPI74FCT162H374T  
are high-speed,  
low power devices with high current drive.  
• Vcc=5V±10%  
Pericom Semiconductor’s PI74FCT series of logic circuits are  
producedintheCompany’sadvanced0.6micronCMOStechnology,  
achieving industry leading speed grades.  
ThePI74FCT16374T,PI74FCT162374T,andPI74FCT162H374T  
are 16-bit octal registers designed with 16 D-type flip-flops with a  
buffered common clock and 3-state outputs. The Output Enable  
(xOE) and clock (xCLK) controls are organized to operate as  
two 8-bit registers or one 16-bit register. When OE is HIGH, the  
outputs are in the high impedance state. Input data meeting the  
setup and hold time requirements of the D inputs is transferred to  
the O outputs on the LOW-to-HIGH transition of the clock input.  
• Hysteresis on all inputs  
• Packagesavailable:  
48-pin240milwideplasticTSSOP(A)  
48-pin300milwideplasticSSOP(V)  
PI74FCT16374TFeatures:  
• High output drive: IOH = –32 mA; IOL = 64 mA  
• Power off disable outputs permit "live insertion"  
• Typical VOLP (Output Ground Bounce) < 1.0V  
atVCC =5V,TA =25°C  
PI74FCT162374TFeatures:  
• Balanced output drivers: ±24 mA  
• Reduced system switching noise  
• Typical VOLP (Output Ground Bounce) < 0.6V  
atVCC =5V,TA =25°C  
PI74FCT162H374TFeatures:  
• Bus Hold retains last active bus state during 3-state  
• Eliminates the need for external pull-up resistors  
The PI74FCT16374T output buffers are designed with a Power-Off  
disable allowing “live insertion” of boards when used as backplane  
drivers.  
The PI74FCT162374T has ±24 mA balanced output drivers. It is  
designed with current limiting resistors at its outputs to control the  
output edge rate resulting in lower ground bounce and undershoot.  
This eliminates the need for external terminating resistors for most  
interface applications.  
The PI74FCT162H374T has “Bus Hold” which retains the input’s  
last state whenever the input goes to high-impedance preventing  
“floating” inputs and eliminating the need for pull-up/down  
resistors.  
Logic Block Diagram  
1OE  
2OE  
1CLK  
2CLK  
1D0  
2D0  
D
D
1O0  
2O0  
C
C
TO 7 OTHER CHANNELS  
TO 7 OTHER CHANNELS  
PS2034A  
03/28/01  
1

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